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gpu: nvgpu: rework regops execution API

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Rework regops execution API to accomodate below updates for new
profiler design

- gops.regops.exec_regops() should accept TSG pointer instead of
  channel pointer.
- Remove individual boolean parameters and add one flag field.

Below new flags are added to this API :
NVGPU_REG_OP_FLAG_MODE_ALL_OR_NONE
NVGPU_REG_OP_FLAG_MODE_CONTINUE_ON_ERROR
NVGPU_REG_OP_FLAG_ALL_PASSED
NVGPU_REG_OP_FLAG_DIRECT_OPS

Update other APIs, e.g. gr_gk20a_exec_ctx_ops() and validate_reg_ops()
as per new API changes.

Add new API gk20a_is_tsg_ctx_resident() to check context residency
from TSG pointer.

Convert gr_gk20a_ctx_patch_smpc() to a HAL gops.gr.ctx_patch_smpc().
Set this HAL only for gm20b since it is not required for later chips.
Also, remove subcontext code from this function since gm20b does not
support subcontext.

Remove stale comment about missing vGPU support in exec_regops_gk20a()

Bug 2510974
Jira NVGPU-5360

Change-Id: I3c25c34277b5ca88484da1e20d459118f15da102
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2389733
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-07-29 18:25:19 +05:30
committed by Alex Waterman
parent a73b5d3c6f
commit 6daa0636d1
13 changed files with 172 additions and 131 deletions
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22
drivers/gpu/nvgpu/os/linux/ioctl_dbg.c
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@@ -778,12 +778,10 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
{
int err = 0, powergate_err = 0;
bool is_pg_disabled = false;
struct gk20a *g = dbg_s->g;
struct nvgpu_channel *ch;
bool is_current_ctx = false;
struct nvgpu_tsg *tsg = NULL;
u32 flags = NVGPU_REG_OP_FLAG_MODE_ALL_OR_NONE;
nvgpu_log_fn(g, "%d ops, max fragment %d", args->num_ops, g->dbg_regops_tmp_buf_ops);
@@ -813,6 +811,14 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
return -EINVAL;
}
if (ch != NULL) {
tsg = nvgpu_tsg_from_ch(ch);
if (tsg == NULL) {
nvgpu_err(g, "channel not bound to TSG");
return -EINVAL;
}
}
/* since exec_reg_ops sends methods to the ucode, it must take the
* global gpu lock to protect against mixing methods from debug sessions
* on other channels */
@@ -869,16 +875,16 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
if (err)
break;
err = g->ops.regops.exec_regops(g, ch,
g->dbg_regops_tmp_buf, num_ops,
dbg_s->is_profiler, &is_current_ctx);
err = g->ops.regops.exec_regops(g, tsg,
g->dbg_regops_tmp_buf, num_ops, &flags);
if (err) {
break;
}
if (ops_offset == 0) {
args->gr_ctx_resident = is_current_ctx;
args->gr_ctx_resident =
flags & NVGPU_REG_OP_FLAG_DIRECT_OPS;
}
err = nvgpu_get_regops_data_linux(g->dbg_regops_tmp_buf,