diff --git a/Makefile.umbrella.tmk b/Makefile.umbrella.tmk index b53e5cf5d..ca37c0b59 100644 --- a/Makefile.umbrella.tmk +++ b/Makefile.umbrella.tmk @@ -99,6 +99,8 @@ NV_REPOSITORY_COMPONENTS += userspace/units/fifo/pbdma/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/pbdma/gm20b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/pbdma/gp10b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/preempt +NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramfc/gp10b +NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramfc/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gk20a NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gm20b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gp10b diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index 84f14e95e..fdb618f10 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -82,6 +82,7 @@ gm20b_priv_ring_get_gpc_count gm20b_priv_ring_get_fbp_count gm20b_gr_falcon_submit_fecs_method_op gm20b_bus_bar1_bind +gp10b_bus_bar2_bind gp10b_ce_nonstall_isr gp10b_get_max_page_table_levels gp10b_mm_get_default_big_page_size @@ -99,7 +100,7 @@ gp10b_get_device_info gp10b_is_engine_ce gp10b_priv_ring_isr gp10b_priv_ring_decode_error_code -gp10b_bus_bar2_bind +gp10b_ramfc_commit_userd gv100_dump_engine_status gv100_read_engine_status_info gv11b_ce_get_num_pce @@ -176,6 +177,8 @@ gv11b_pbdma_handle_intr_1 gv11b_pbdma_intr_enable gv11b_pbdma_set_channel_info_veid gv11b_pbdma_setup_hw +gv11b_ramfc_capture_ram_dump +gv11b_ramfc_setup gv11b_ramin_init_subctx_pdb gv11b_ramin_set_eng_method_buffer gv11b_ramin_set_gr_ptr diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index e0eddf8b8..36258c67b 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -108,6 +108,8 @@ UNITS := \ $(UNIT_SRC)/fifo/pbdma/gp10b \ $(UNIT_SRC)/fifo/pbdma/gv11b \ $(UNIT_SRC)/fifo/preempt \ + $(UNIT_SRC)/fifo/ramfc/gp10b \ + $(UNIT_SRC)/fifo/ramfc/gv11b \ $(UNIT_SRC)/fifo/ramin/gk20a \ $(UNIT_SRC)/fifo/ramin/gm20b \ $(UNIT_SRC)/fifo/ramin/gp10b \ diff --git a/userspace/SWUTS.h b/userspace/SWUTS.h index 37d689f1c..43a72a828 100644 --- a/userspace/SWUTS.h +++ b/userspace/SWUTS.h @@ -55,6 +55,8 @@ * - @ref SWUTS-fifo-pbdma-gp10b * - @ref SWUTS-fifo-pbdma-gv11b * - @ref SWUTS-fifo-preempt + * - @ref SWUTS-fifo-ramfc-gp10b + * - @ref SWUTS-fifo-ramfc-gv11b * - @ref SWUTS-fifo-ramin-gk20a * - @ref SWUTS-fifo-ramin-gm20b * - @ref SWUTS-fifo-ramin-gp10b diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index 5f108639b..8b72f2135 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -29,6 +29,8 @@ INPUT += ../../../userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.h INPUT += ../../../userspace/units/fifo/pbdma/gp10b/nvgpu-pbdma-gp10b.h INPUT += ../../../userspace/units/fifo/pbdma/gv11b/nvgpu-pbdma-gv11b.h INPUT += ../../../userspace/units/fifo/preempt/nvgpu-preempt.h +INPUT += ../../../userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.h +INPUT += ../../../userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.h INPUT += ../../../userspace/units/fifo/ramin/gk20a/ramin-gk20a-fusa.h INPUT += ../../../userspace/units/fifo/ramin/gm20b/ramin-gm20b-fusa.h INPUT += ../../../userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.h diff --git a/userspace/units/fifo/ramfc/gp10b/Makefile b/userspace/units/fifo/ramfc/gp10b/Makefile new file mode 100644 index 000000000..9b6075a5e --- /dev/null +++ b/userspace/units/fifo/ramfc/gp10b/Makefile @@ -0,0 +1,32 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +.SUFFIXES: + +OBJS = nvgpu-ramfc-gp10b.o +MODULE = nvgpu-ramfc-gp10b + +LIB_PATHS += -lnvgpu-fifo-common +include ../../../Makefile.units + +lib$(MODULE).so: fifo + +fifo: + $(MAKE) -C ../.. diff --git a/userspace/units/fifo/ramfc/gp10b/Makefile.interface.tmk b/userspace/units/fifo/ramfc/gp10b/Makefile.interface.tmk new file mode 100644 index 000000000..cc68eb2ee --- /dev/null +++ b/userspace/units/fifo/ramfc/gp10b/Makefile.interface.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=nvgpu-ramfc-gp10b + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramfc/gp10b/Makefile.tmk b/userspace/units/fifo/ramfc/gp10b/Makefile.tmk new file mode 100644 index 000000000..16f949717 --- /dev/null +++ b/userspace/units/fifo/ramfc/gp10b/Makefile.tmk @@ -0,0 +1,40 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME = nvgpu-ramfc-gp10b +NVGPU_UNIT_SRCS = nvgpu-ramfc-gp10b.c + +NVGPU_UNIT_INTERFACE_DIRS := \ + $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \ + $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.c b/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.c new file mode 100644 index 000000000..8b8460c76 --- /dev/null +++ b/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.c @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "hal/fifo/ramin_gk20a.h" +#include "hal/fifo/ramfc_gk20a.h" +#include "hal/fifo/ramfc_gp10b.h" + +#include "../../nvgpu-fifo-common.h" +#include "nvgpu-ramfc-gp10b.h" + +#define assert(cond) unit_assert(cond, goto done) + +struct stub_ctx { + u32 addr_lo; + u32 addr_hi; +}; + +struct stub_ctx stub[1]; + +#define USERD_IOVA_ADDR_LO 1U +#define USERD_IOVA_ADDR_HI 2U + +static u32 stub_pbdma_get_userd_aperture_mask(struct gk20a *g, + struct nvgpu_mem *mem) +{ + /* Assuming mem is SYSMEM */ + return pbdma_userd_target_sys_mem_ncoh_f(); +} + +static u32 stub_pbdma_get_userd_addr(u32 addr_lo) +{ + stub[0].addr_lo = addr_lo; + return 0U; +} + +static u32 stub_pbdma_get_userd_hi_addr(u32 addr_hi) +{ + stub[0].addr_hi = addr_hi; + return 1U; +} + +int test_gp10b_ramfc_commit_userd(struct unit_module *m, struct gk20a *g, + void *args) +{ + struct nvgpu_channel ch; + int ret = UNIT_FAIL; + int err; + + g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; + g->ops.pbdma.get_userd_aperture_mask = + stub_pbdma_get_userd_aperture_mask; + g->ops.pbdma.get_userd_addr = stub_pbdma_get_userd_addr; + g->ops.pbdma.get_userd_hi_addr = stub_pbdma_get_userd_hi_addr; + + /* Aperture should be fixed = SYSMEM */ + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, true); + err = nvgpu_alloc_inst_block(g, &ch.inst_block); + assert(err == 0); + + ch.g = g; + ch.chid = 0; + ch.userd_iova = (((u64)USERD_IOVA_ADDR_HI << 32U) | + USERD_IOVA_ADDR_LO) << ram_userd_base_shift_v(); + + gp10b_ramfc_commit_userd(&ch); + assert(stub[0].addr_lo == USERD_IOVA_ADDR_LO); + assert(stub[0].addr_hi == (USERD_IOVA_ADDR_HI) << + ram_userd_base_shift_v()); + assert(nvgpu_mem_rd32(g, &ch.inst_block, + ram_in_ramfc_w() + ram_fc_userd_w()) == + pbdma_userd_target_sys_mem_ncoh_f()); + assert(nvgpu_mem_rd32(g, &ch.inst_block, + ram_in_ramfc_w() + ram_fc_userd_hi_w()) == 1U); + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s failed\n", __func__); + } + + nvgpu_free_inst_block(g, &ch.inst_block); + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, false); + return ret; +} + +struct unit_module_test nvgpu_ramfc_gp10b_tests[] = { + UNIT_TEST(commit_userd, test_gp10b_ramfc_commit_userd, NULL, 0), +}; + +UNIT_MODULE(nvgpu_ramfc_gp10b, nvgpu_ramfc_gp10b_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.h b/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.h new file mode 100644 index 000000000..b212ee2e4 --- /dev/null +++ b/userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.h @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef UNIT_NVGPU_RAMFC_GP10B_H +#define UNIT_NVGPU_RAMFC_GP10B_H + +#include + +struct unit_module; +struct gk20a; + +/** @addtogroup SWUTS-fifo-ramfc-gp10b + * @{ + * + * Software Unit Test Specification for fifo/ramfc/gp10b + */ + +/** + * Test specification for: test_gp10b_ramfc_commit_userd + * + * Description: Test userd commit + * + * Test Type: Feature based + * + * Targets: gp10b_ramfc_commit_userd + * + * Input: None + * + * Steps: + * - Save userd aperture and address in channel instance block. + * - Check stored value is correct as expected. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gp10b_ramfc_commit_userd(struct unit_module *m, struct gk20a *g, + void *args); + +/** + * @} + */ + +#endif /* UNIT_NVGPU_RAMFC_GP10B_H */ diff --git a/userspace/units/fifo/ramfc/gv11b/Makefile b/userspace/units/fifo/ramfc/gv11b/Makefile new file mode 100644 index 000000000..99639374f --- /dev/null +++ b/userspace/units/fifo/ramfc/gv11b/Makefile @@ -0,0 +1,32 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +.SUFFIXES: + +OBJS = nvgpu-ramfc-gv11b.o +MODULE = nvgpu-ramfc-gv11b + +LIB_PATHS += -lnvgpu-fifo-common +include ../../../Makefile.units + +lib$(MODULE).so: fifo + +fifo: + $(MAKE) -C ../.. diff --git a/userspace/units/fifo/ramfc/gv11b/Makefile.interface.tmk b/userspace/units/fifo/ramfc/gv11b/Makefile.interface.tmk new file mode 100644 index 000000000..d2e03d850 --- /dev/null +++ b/userspace/units/fifo/ramfc/gv11b/Makefile.interface.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=nvgpu-ramfc-gv11b + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramfc/gv11b/Makefile.tmk b/userspace/units/fifo/ramfc/gv11b/Makefile.tmk new file mode 100644 index 000000000..8ee6a7b81 --- /dev/null +++ b/userspace/units/fifo/ramfc/gv11b/Makefile.tmk @@ -0,0 +1,40 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME = nvgpu-ramfc-gv11b +NVGPU_UNIT_SRCS = nvgpu-ramfc-gv11b.c + +NVGPU_UNIT_INTERFACE_DIRS := \ + $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \ + $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.c b/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.c new file mode 100644 index 000000000..31dc9b6b2 --- /dev/null +++ b/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.c @@ -0,0 +1,257 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "hal/fifo/ramin_gk20a.h" +#include "hal/fifo/ramfc_gv11b.h" + +#include "../../nvgpu-fifo-common.h" +#include "nvgpu-ramfc-gv11b.h" + +#ifdef RAMFC_GV11B_UNIT_DEBUG +#undef unit_verbose +#define unit_verbose unit_info +#else +#define unit_verbose(unit, msg, ...) \ + do { \ + if (0) { \ + unit_info(unit, msg, ##__VA_ARGS__); \ + } \ + } while (0) +#endif + +#define assert(cond) unit_assert(cond, goto done) + +#define branches_str test_fifo_flags_str +#define pruned test_fifo_subtest_pruned + +static u32 global_count; + +static u32 stub_pbdma_acquire_val(u64 timeout) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_gp_base(u64 gpfifo_base) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_gp_base_hi(u64 gpfifo_base, u32 gpfifo_entry) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_signature(struct gk20a *g) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_fc_pb_header(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_fc_subdevice(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_fc_target(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_fc_runlist_timeslice(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_set_channel_info_veid(u32 subctx_id) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_config_auth_level_privileged(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_get_ctrl_hce_priv_mode_yes(void) +{ + global_count++; + return 0U; +} + +static u32 stub_pbdma_config_userd_writeback_enable(void) +{ + global_count++; + return 5U; +} + +static int stub_ramfc_commit_userd(struct nvgpu_channel *ch) +{ + global_count++; + return 0; +} + +static void stub_ramin_init_subctx_pdb(struct gk20a *g, + struct nvgpu_mem *inst_block, struct nvgpu_mem *pdb_mem, + bool replayable) +{ + global_count++; +} + +#define F_RAMFC_SETUP_PRIVILEDGED_CH BIT(0) +#define F_RAMFC_SETUP_LAST BIT(1) + +static const char *f_ramfc_setup[] = { + "priviledged_ch_true", +}; + +int test_gv11b_ramfc_setup(struct unit_module *m, struct gk20a *g, void *args) +{ + struct gpu_ops gops = g->ops; + struct nvgpu_channel ch; + struct vm_gk20a vm = {0}; + int ret = UNIT_FAIL; + u32 branches = 0U; + int err; + + g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; + g->ops.pbdma.acquire_val = stub_pbdma_acquire_val; + g->ops.ramin.init_subctx_pdb = stub_ramin_init_subctx_pdb; + g->ops.pbdma.get_gp_base = stub_pbdma_get_gp_base; + g->ops.pbdma.get_gp_base_hi = stub_pbdma_get_gp_base_hi; + g->ops.pbdma.get_signature = stub_pbdma_get_signature; + g->ops.pbdma.get_fc_pb_header = stub_pbdma_get_fc_pb_header; + g->ops.pbdma.get_fc_subdevice = stub_pbdma_get_fc_subdevice; + g->ops.pbdma.get_fc_target = stub_pbdma_get_fc_target; + g->ops.pbdma.get_fc_runlist_timeslice = + stub_pbdma_get_fc_runlist_timeslice; + g->ops.pbdma.set_channel_info_veid = stub_pbdma_set_channel_info_veid; + g->ops.pbdma.get_config_auth_level_privileged = + stub_pbdma_get_config_auth_level_privileged; + g->ops.pbdma.get_ctrl_hce_priv_mode_yes = + stub_pbdma_get_ctrl_hce_priv_mode_yes; + g->ops.pbdma.config_userd_writeback_enable = + stub_pbdma_config_userd_writeback_enable; + g->ops.ramfc.commit_userd = stub_ramfc_commit_userd; + + /* Aperture should be fixed = SYSMEM */ + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, true); + err = nvgpu_alloc_inst_block(g, &ch.inst_block); + assert(err == 0); + + ch.g = g; + ch.subctx_id = 1; + ch.vm = &vm; + memset(&ch.vm->pdb, 0, sizeof(struct nvgpu_gmmu_pd)); + + for (branches = 0U; branches < F_RAMFC_SETUP_LAST; branches++) { + unit_verbose(m, "%s branches=%s\n", + __func__, branches_str(branches, f_ramfc_setup)); + + global_count = 0U; + ch.is_privileged_channel = + branches & F_RAMFC_SETUP_PRIVILEDGED_CH ? + true : false; + + err = gv11b_ramfc_setup(&ch, 0U, 0U, 0ULL, 0U); + assert(err == 0); + assert(nvgpu_mem_rd32(g, &ch.inst_block, + ram_fc_config_w()) == 5U); + + if (branches & F_RAMFC_SETUP_PRIVILEDGED_CH) { + assert(global_count == 15U); + } else { + assert(global_count == 13U); + } + } + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s branches=%s\n", __func__, + branches_str(branches, f_ramfc_setup)); + } + + nvgpu_free_inst_block(g, &ch.inst_block); + g->ops = gops; + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, false); + return ret; +} + +int test_gv11b_ramfc_capture_ram_dump(struct unit_module *m, + struct gk20a *g, void *args) +{ + struct nvgpu_channel ch; + struct nvgpu_channel_dump_info info; + int ret = UNIT_FAIL; + int err; + + g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; + + err = nvgpu_alloc_inst_block(g, &ch.inst_block); + assert(err == 0); + + nvgpu_memset(g, &ch.inst_block, 0U, 0xa5U, 256U); + + gv11b_ramfc_capture_ram_dump(g, &ch, &info); + assert(info.inst.pb_top_level_get == 0xa5a5a5a5a5a5a5a5); + assert(info.inst.pb_count == 0xa5a5a5a5); + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s failed\n", __func__); + } + + nvgpu_free_inst_block(g, &ch.inst_block); + return ret; +} + +struct unit_module_test nvgpu_ramfc_gv11b_tests[] = { + UNIT_TEST(ramfc_setup, test_gv11b_ramfc_setup, NULL, 0), + UNIT_TEST(capture_ram_dump, test_gv11b_ramfc_capture_ram_dump, NULL, 0), +}; + +UNIT_MODULE(nvgpu_ramfc_gv11b, nvgpu_ramfc_gv11b_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.h b/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.h new file mode 100644 index 000000000..09dec218f --- /dev/null +++ b/userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.h @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef UNIT_NVGPU_RAMFC_GV11B_H +#define UNIT_NVGPU_RAMFC_GV11B_H + +#include + +struct unit_module; +struct gk20a; + +/** @addtogroup SWUTS-fifo-ramfc-gv11b + * @{ + * + * Software Unit Test Specification for fifo/ramfc/gv11b + */ + +/** + * Test specification for: test_gv11b_ramfc_setup + * + * Description: Test ramfc setup for channel + * + * Test Type: Feature based + * + * Targets: gv11b_ramfc_setup + * + * Input: None + * + * Steps: + * - Save pbdma config values in channel instance block memory. + * - Check that the stored value is correct. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gv11b_ramfc_setup(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Test specification for: test_gv11b_ramfc_capture_ram_dump + * + * Description: Test channel status dump + * + * Test Type: Feature based + * + * Targets: gv11b_ramfc_capture_ram_dump + * + * Input: None + * + * Steps: + * - Read channel status from channel instance block. + * - Check that channel dump info read is correct as expected. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gv11b_ramfc_capture_ram_dump(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * @} + */ + +#endif /* UNIT_NVGPU_RAMFC_GV11B_H */