diff --git a/arch/nvgpu-common.yaml b/arch/nvgpu-common.yaml new file mode 100644 index 000000000..e3b93c422 --- /dev/null +++ b/arch/nvgpu-common.yaml @@ -0,0 +1,887 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# Common elements and units in nvgpu. +# + +## +## Top level common units. +## + +# This isn't really a unit per say but I needed some place to put these +# files. Perhaps it could become a unit some day? +nvgpu: + safe: yes + owner: Alex W + sources: [ include/nvgpu/gk20a.h, + include/nvgpu/nvgpu_common.h ] + +bios: + safe: yes + gpu: dgpu + owner: Tejal K + sources: [ common/vbios/bios.c, + include/nvgpu/bios.h ] + +ce: + safe: yes + gpu: dgpu + owner: Thomas F + sources: [ common/ce.c, + common/ce/ce_priv.h, + include/nvgpu/ce.h ] + deps: + +debug: + safe: yes + gpu: both + sources: [ include/nvgpu/debug.h ] + +debugger: + safe: no + owner: Deepak N + sources: [ common/debugger.c, + include/nvgpu/debugger.h ] + deps: + +defaults: + safe: yes + sources: [ include/nvgpu/defaults.h ] + +ecc: + safe: yes + owner: Antony C + sources: [ common/ecc.c, + include/nvgpu/ecc.h ] + deps: + +enabled: + safe: yes + owner: Alex W + sources: [ common/enabled.c, + include/nvgpu/enabled.h ] + deps: + tags: unit-testable + +# Pretty sure this can be marked as not-safe since we plan to use +# usermode submits in the safety build. +fence: + safe: no + owner: Seema K + sources: [ common/fence/fence.c ] + +io: + safe: yes + owner: Vinod G + sources: [ common/io/io.c ] + deps: + +ltc: + safe: yes + owner: Seshendra G + sources: [ common/ltc/ltc.c, + include/nvgpu/ltc.h ] + +cbc: + safe: no + owner: Seshendra G + sources: [ common/cbc/cbc.c, + include/nvgpu/cbc.h ] + +regops: + safe: no + owner: Deepak N + sources: [ common/regops/regops.c, + include/nvgpu/regops.h ] + +mc: + safe: yes + owner: Seema K + sources: [ common/mc/mc.c, + include/nvgpu/mc.h ] +class: + safe: yes + owner: Seshendra G + sources: [ include/nvgpu/class.h ] + + +netlist: + safe: yes + gpu: both + owner: Seshendra G + sources: [ common/netlist/netlist.c, + common/netlist/netlist_priv.h, + common/netlist/netlist_defs.h, + include/nvgpu/netlist.h ] + +nvlink: + safe: yes + owner: Tejal K + gpu: dgpu + sources: [ common/nvlink/nvlink.c, + common/nvlink/minion.c, + common/nvlink/probe.c, + common/nvlink/link_mode_transitions.c, + common/nvlink/init/device_reginit.c, + common/nvlink/init/device_reginit_gv100.c, + common/nvlink/init/device_reginit_gv100.h, + common/nvlink/intr_and_err_handling_gv100.c, + common/nvlink/intr_and_err_handling_gv100.h, + include/nvgpu/nvlink.h, + include/nvgpu/nvlink_device_reginit.h, + include/nvgpu/nvlink_link_mode_transitions.h, + include/nvgpu/nvlink_minion.h, + include/nvgpu/nvlink_probe.h ] + +nvgpu_err: + safe: yes + owner: Unknown + sources: [ include/nvgpu/nvgpu_err.h ] + +pramin: + safe: yes + owner: Terje B + sources: [ common/pramin.c, + include/nvgpu/pramin.h ] + deps: + +ptimer: + safe: yes + owner: Terje B + sources: [ common/ptimer/ptimer.c, + include/nvgpu/ptimer.h ] + deps: + +rbtree: + safe: yes + owner: Deepak N + sources: [ common/rbtree.c ] + deps: + +semaphore: + safe: no + owner: Alex W + children: + semaphore: + sources: [ common/semaphore/semaphore.c, + common/semaphore/semaphore_priv.h, + include/nvgpu/semaphore.h ] + deps: [ ] + semaphore_hw: + sources: [ common/semaphore/semaphore_hw.c ] + deps: [ ] + semaphore_pool: + sources: [ common/semaphore/semaphore_pool.c ] + deps: [ ] + semaphore_sea: + sources: [ common/semaphore/semaphore_sea.c ] + deps: [ ] +sim: + safe: no + gpu: igpu + owner: Seshendra G + sources: [ common/sim/sim.c, + common/sim/sim_pci.c, + common/sim/sim_netlist.c, + include/nvgpu/hw_sim.h, + include/nvgpu/hw_sim_pci.h, + include/nvgpu/sim.h ] + +string: + safe: yes + owner: Terje B + sources: [ common/string.c ] + deps: + +unit: + safe: yes + owner: Terje B + sources: [ include/nvgpu/unit.h ] + +utils: + safe: yes + owner: Terje B + sources: [ include/nvgpu/utils.h ] + +## +## Common elements. +## + +acr: + safe: yes + owner: Mahantesh K + sources: [ common/acr/acr.c, + common/acr/acr_blob_alloc.c, + common/acr/acr_blob_alloc.h, + common/acr/acr_blob_construct_v0.c, + common/acr/acr_blob_construct_v0.h, + common/acr/acr_blob_construct_v1.c, + common/acr/acr_blob_construct_v1.h, + common/acr/acr_bootstrap.c, + common/acr/acr_bootstrap.h, + common/acr/acr_falcon_bl.h, + common/acr/acr_priv.h, + common/acr/acr_sw_gp10b.c, + common/acr/acr_sw_gp10b.h, + common/acr/acr_sw_gv100.c, + common/acr/acr_wpr.c, + common/acr/acr_wpr.h, + common/acr/acr_sw_gm20b.c, + common/acr/acr_sw_gm20b.h, + common/acr/acr_sw_gv100.h, + common/acr/acr_sw_gv11b.c, + common/acr/acr_sw_gv11b.h, + common/acr/acr_sw_tu104.c, + common/acr/acr_sw_tu104.h, + include/nvgpu/acr.h ] + +engine_queues: + owner: Sagar K + children: + mem_queues: + children: + mem_queue: + safe: yes + gpu: both + sources: [ common/engine_queues/engine_mem_queue.c, + common/engine_queues/engine_mem_queue_priv.h, + include/nvgpu/engine_mem_queue.h, + include/nvgpu/engine_queue.h ] + deps: [ ] + tags: unit-testable + dmem_queue: + safe: no + gpu: igpu + sources: [ common/engine_queues/engine_dmem_queue.c, + common/engine_queues/engine_dmem_queue.h ] + deps: [ ] + tags: unit-testable + emem_queue: + safe: yes + gpu: dgpu + sources: [ common/engine_queues/engine_emem_queue.c, + common/engine_queues/engine_emem_queue.h ] + deps: [ ] + tags: unit-testable + fb_queue: + safe: yes + gpu: dgpu + sources: [ common/engine_queues/engine_fb_queue.c, + common/engine_queues/engine_fb_queue_priv.h, + include/nvgpu/engine_fb_queue.h ] + deps: [ ] + tags: unit-testable + +falcon: + owner: Sagar K + safe: yes + gpu: both + sources: [ common/falcon/falcon.c, + common/falcon/falcon_sw_gk20a.c, + common/falcon/falcon_sw_gp106.c, + common/falcon/falcon_sw_gv100.c, + common/falcon/falcon_sw_tu104.c, + common/falcon/falcon_sw_gk20a.h, + common/falcon/falcon_sw_gp106.h, + common/falcon/falcon_sw_gv100.h, + common/falcon/falcon_sw_tu104.h, + include/nvgpu/falcon.h, + include/nvgpu/flcnif_cmn.h ] + deps: [ ] + tags: + +rc: + safe: no + owner: Seema K + sources: [ common/rc/rc.c, + include/nvgpu/rc.h ] + +fifo: + safe: yes + owner: Seema K + children: + channel: + safe: yes + sources: [ common/fifo/channel.c, + include/nvgpu/fifo.h, + include/nvgpu/channel.h, + include/nvgpu/error_notifier.h ] + deps: [ ] + tsg: + safe: yes + sources: [ common/fifo/tsg.c, + include/nvgpu/tsg.h ] + deps: [ ] + submit: + safe: yes + sources: [ common/fifo/submit.c ] + deps: [ ] + runlist: + safe: yes + sources: [ common/fifo/runlist.c, + include/nvgpu/runlist.h ] + deps: [ ] + userd: + safe: no + sources: [ common/fifo/userd.c, + include/nvgpu/fifo/userd.h ] + deps: [ ] + pbdma_status: + safe: yes + sources: [ common/fifo/pbdma_status.c, + include/nvgpu/pbdma_status.h ] + deps: [ ] + engine_status: + safe: yes + sources: [ common/fifo/engine_status.c, + include/nvgpu/engine_status.h ] + deps: [] + engines: + safe: yes + sources: [ common/fifo/engines.c, + include/nvgpu/engines.h ] + deps: [] + + preempt: + safe: yes + sources: [ common/fifo/preempt.c, + include/nvgpu/preempt.h ] + deps: [] + +gr: + safe: yes + owner: Deepak N + children: + gr: + safe: yes + sources: [ common/gr/gr.c, + common/gr/gr_priv.h, + include/nvgpu/gr/gr.h ] + global_ctx: + safe: yes + sources: [ common/gr/global_ctx.c, + common/gr/global_ctx_priv.h, + include/nvgpu/gr/global_ctx.h ] + ctx: + safe: yes + sources: [ common/gr/ctx.c, + include/nvgpu/gr/ctx.h ] + obj_ctx: + safe: yes + sources: [ common/gr/obj_ctx.c, + common/gr/obj_ctx_priv.h, + include/nvgpu/gr/obj_ctx.h ] + subctx: + safe: yes + sources: [ common/gr/subctx.c, + include/nvgpu/gr/subctx.h ] + fs_state: + safe: yes + sources: [ common/gr/fs_state.c, + include/nvgpu/gr/fs_state.h ] + config: + safe: yes + sources: [ common/gr/gr_config.c, + include/nvgpu/gr/config.h ] + fecs_trace: + safe: no + sources: [ common/gr/fecs_trace.c, + include/nvgpu/gr/fecs_trace.h ] + zbc: + safe: no + sources: [ common/gr/zbc.c, + common/gr/zbc_priv.h, + include/nvgpu/gr/zbc.h ] + zcull: + safe: no + sources: [ common/gr/zcull.c, + common/gr/zcull_priv.h, + include/nvgpu/gr/zcull.h ] + hwpm_map: + safe: no + sources: [ common/gr/hwpm_map.c, + include/nvgpu/gr/hwpm_map.h ] + falcon: + safe: yes + sources: [ common/gr/gr_falcon.c, + common/gr/gr_falcon_priv.h, + include/nvgpu/gr/gr_falcon.h ] + intr: + safe: yes + sources: [ common/gr/gr_intr.c, + common/gr/gr_intr_priv.h, + include/nvgpu/gr/gr_intr.h ] + setup: + safe: yes + sources: [ common/gr/gr_setup.c, + include/nvgpu/gr/setup.h ] + +fbp: + safe: yes + owner: Deepak N + sources: [ common/fbp/fbp.c, + common/fbp/fbp_priv.h, + include/nvgpu/fbp.h ] + +init: + safe: yes + owner: Terje B + children: + nvgpu: + safe: yes + sources: [ common/init/nvgpu_init.c ] + +mm: + owner: Alex W + children: + as: + safe: yes + sources: [ common/mm/as.c, + include/nvgpu/as.h ] + comptags: + safe: no + gpu: igpu + sources: [ common/mm/comptags.c, + include/nvgpu/comptags.h ] + mmu_fault: + safe: yes + sources: [ include/nvgpu/mmu_fault.h ] + deps: [ ] + + gmmu: + safe: yes + children: + pd_cache: + safe: yes + sources: [ common/mm/gmmu/pd_cache.c, + common/mm/gmmu/pd_cache_priv.h, + include/nvgpu/pd_cache.h ] + deps: [ nvgpu.interface.kmem ] + tags: M4, unit-testable + page_table: + safe: yes + sources: [ common/mm/gmmu/page_table.c, + include/nvgpu/gmmu.h ] + deps: [ nvgpu.interface.kmem ] + tags: M4, unit-testable + allocators: + safe: yes + children: + nvgpu: + safe: yes + sources: [ common/mm/allocators/nvgpu_allocator.c, + include/nvgpu/allocator.h ] + deps: [ ] + tags: unit-testable + bitmap: + safe: yes + sources: [ common/mm/allocators/bitmap_allocator.c, + common/mm/allocators/bitmap_allocator_priv.h ] + deps: [ ] + tags: unit-testable + buddy: + safe: yes + sources: [ common/mm/allocators/buddy_allocator.c, + common/mm/allocators/buddy_allocator_priv.h ] + deps: [ ] + tags: unit-testable + page: + safe: yes + sources: [ common/mm/allocators/page_allocator.c, + include/nvgpu/page_allocator.h ] + deps: [ ] + lockless: + safe: no + sources: [ common/mm/allocators/lockless_allocator.c, + common/mm/allocators/lockless_allocator_priv.h ] + tags: unit-testable + dma: + safe: yes + sources: [ common/mm/dma.c ] + deps: [ ] + tags: unit-testable + mm: + safe: yes + sources: [ common/mm/mm.c, + include/nvgpu/mm.h ] + deps: [ ] + nvgpu_mem: + safe: yes + sources: [ common/mm/nvgpu_mem.c, + include/nvgpu/nvgpu_mem.h ] + deps: [ ] + tags: unit-testable + nvgpu_sgt: + safe: yes + sources: [ common/mm/nvgpu_sgt.c, + include/nvgpu/nvgpu_sgt.h ] + deps: [ ] + vidmem: + safe: yes + gpu: dgpu + sources: [ common/mm/vidmem.c, + include/nvgpu/vidmem.h ] + deps: [ ] + vm_area: + safe: yes + sources: [ common/mm/vm_area.c, + include/nvgpu/vm_area.h ] + deps: [ ] + tags: unit-testable + vm: + safe: yes + sources: [ common/mm/vm.c, + include/nvgpu/vm.h ] + deps: [ ] + tags: M4, unit-testable + +perf: + safe: no + owner: Deepak N + children: + perfbuf: + safe: no + sources: [ common/perf/perfbuf.c, + include/nvgpu/perfbuf.h ] + cyclestats_snapshot: + safe: no + sources: [ common/perf/cyclestats_snapshot.c, + include/nvgpu/cyclestats_snapshot.h ] + +cyclestats: + safe: no + owner: Deepak N + sources: [ common/cyclestats/cyclestats.c, + common/cyclestats/cyclestats_priv.h, + include/nvgpu/cyclestats.h ] + +pmu: + children: + pmuif: + safe: yes + owner: Sagar K + # Subset of each interfaces should be distributed to individual units. + # TODO! + sources: [ include/nvgpu/pmu/pmuif/ctrlboardobj.h, + include/nvgpu/pmu/pmuif/ctrlclk.h, + include/nvgpu/pmu/pmuif/ctrlclkavfs.h, + include/nvgpu/pmu/pmuif/ctrlperf.h, + include/nvgpu/pmu/pmuif/ctrlpmgr.h, + include/nvgpu/pmu/pmuif/ctrltherm.h, + include/nvgpu/pmu/pmuif/ctrlvolt.h, + include/nvgpu/pmu/pmuif/acr.h, + include/nvgpu/pmu/pmuif/ap.h, + include/nvgpu/pmu/pmuif/cmn.h, + include/nvgpu/pmu/pmuif/perfmon.h, + include/nvgpu/pmu/pmuif/pg.h, + include/nvgpu/pmu/pmuif/pg_rppg.h, + include/nvgpu/pmu/pmuif/pmu.h, + include/nvgpu/pmu/pmuif/bios.h, + include/nvgpu/pmu/pmuif/boardobj.h, + include/nvgpu/pmu/pmuif/clk.h, + include/nvgpu/pmu/pmuif/perf.h, + include/nvgpu/pmu/pmuif/perfvfe.h, + include/nvgpu/pmu/pmuif/pmgr.h, + include/nvgpu/pmu/pmuif/seq.h, + include/nvgpu/pmu/pmuif/therm.h, + include/nvgpu/pmu/pmuif/thermsensor.h, + include/nvgpu/pmu/pmuif/volt.h, + include/nvgpu/pmu/pmuif/rpc.h, + include/nvgpu/pmu/pmuif/nvgpu_cmdif.h ] + boardobj: + safe: yes + owner: Mahantesh K + children: + boardobj: + safe: yes + gpu: dgpu + sources: [ common/pmu/boardobj/boardobj.c, + include/nvgpu/boardobj.h ] + boardobjgrp: + safe: yes + gpu: dgpu + sources: [ common/pmu/boardobj/boardobjgrp.c, + common/pmu/boardobj/boardobjgrp_e255.c, + common/pmu/boardobj/boardobjgrp_e32.c, + include/nvgpu/boardobjgrp.h, + include/nvgpu/boardobjgrp_e255.h, + include/nvgpu/boardobjgrp_e32.h ] + boardobjgrpmask: + safe: yes + gpu: dgpu + sources: [ common/pmu/boardobj/boardobjgrpmask.c, + include/nvgpu/boardobjgrpmask.h ] + pmu: + safe: yes + owner: Mahantesh K + sources: [ common/pmu/pmu.c, + include/nvgpu/pmu.h ] + + perf: + safe: yes + gpu: dgpu + owner: Abdul S + sources: [ common/pmu/perf/change_seq.c, + common/pmu/perf/change_seq.h, + common/pmu/perf/pmu_perf.c, + common/pmu/perf/pmu_perf.h, + common/pmu/perf/vfe_equ.c, + common/pmu/perf/vfe_equ.h, + common/pmu/perf/vfe_var.c, + common/pmu/perf/vfe_var.h, + include/nvgpu/pmu/perf.h ] + + clk: + safe: yes + owner: Ramesh M + children: + clk: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk.c, + include/nvgpu/clk.h, + include/nvgpu/pmu/clk/clk.h ] + arb: + safe: yes + gpu: dgpu + sources: [ include/nvgpu/clk_arb.h ] + + domain: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_domain.c, + include/nvgpu/pmu/clk/clk_domain.h ] + + fll: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_fll.c, + include/nvgpu/pmu/clk/clk_fll.h ] + + freq_controller: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_freq_controller.c, + include/nvgpu/pmu/clk/clk_freq_controller.h ] + prog: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_prog.c, + include/nvgpu/pmu/clk/clk_prog.h ] + + vf_point: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_vf_point.c, + include/nvgpu/pmu/clk/clk_vf_point.h ] + vin: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_vin.c, + include/nvgpu/pmu/clk/clk_vin.h ] + + freq_domain: + safe: yes + gpu: dgpu + sources: [ common/pmu/clk/clk_freq_domain.c, + include/nvgpu/pmu/clk/clk_freq_domain.h ] + ipc: + safe: yes + owner: Sagar K + gpu: dgpu + children: + command: + sources: [ common/pmu/ipc/pmu_cmd.c, + include/nvgpu/pmu/cmd.h ] + + message: + sources: [ common/pmu/ipc/pmu_msg.c, + include/nvgpu/pmu/msg.h ] + + queues: + sources: [ common/pmu/ipc/pmu_queue.c, + include/nvgpu/pmu/queue.h ] + + sequences: + sources: [ common/pmu/ipc/pmu_seq.c, + include/nvgpu/pmu/seq.h ] + + lpwr: + safe: no + gpu: igpu + owner: Divya S + sources: [ common/pmu/lpwr/lpwr.c, + common/pmu/lpwr/rppg.c, + common/pmu/lpwr/lpwr.h, + include/nvgpu/pmu/lpwr.h ] + init: + safe: yes + owner: Mahantesh K + + pg: + safe: no + gpu: igpu + owner: Divya S + sources: [ include/nvgpu/pmu/pmu_pg.h ] + + pmgr: + safe: yes + gpu: dgpu + owner: Abdul S + sources: [ common/pmu/pmgr/pmgr.c, + common/pmu/pmgr/pmgrpmu.c, + common/pmu/pmgr/pwrdev.c, + common/pmu/pmgr/pwrmonitor.c, + common/pmu/pmgr/pwrpolicy.c, + common/pmu/pmgr/pmgr.h, + common/pmu/pmgr/pmgrpmu.h, + common/pmu/pmgr/pwrdev.h, + common/pmu/pmgr/pwrmonitor.h, + common/pmu/pmgr/pwrpolicy.h, + include/nvgpu/pmu/pmgr.h ] + + debug: + safe: yes + owner: Sagar K + sources: [ common/pmu/pmu_debug.c ] + + fw: + safe: yes + owner: Mahantesh K + sources: [ common/pmu/pmu_fw.c ] + + allocator: + safe: yes + owner: Sagar K + gpu: dgpu + sources: [ common/pmu/pmu_allocator.c, + include/nvgpu/pmu/allocator.h ] + + mutex: + safe: yes + owner: Sagar K + gpu: dgpu + sources: [ common/pmu/pmu_mutex.c, + include/nvgpu/pmu/mutex.h ] + + pstate: + safe: yes + gpu: dgpu + owner: Ramesh M + sources: [ common/pmu/pstate/pstate.c, + common/pmu/pstate/pstate.h, + include/nvgpu/pmu/pstate.h ] + + therm: + safe: yes + gpu: dgpu + owner: Abdul S + sources: [ common/pmu/therm/thrm.c, + common/pmu/therm/thrm.h, + common/pmu/therm/thrmchannel.c, + common/pmu/therm/thrmchannel.h, + common/pmu/therm/thrmdev.c, + common/pmu/therm/thrmdev.h, + common/pmu/therm/thrmpmu.c, + common/pmu/therm/thrmpmu.h, + include/nvgpu/therm.h, + include/nvgpu/pmu/therm.h ] + + volt: + safe: yes + gpu: dgpu + owner: Mahantesh K + sources: [ common/pmu/volt/volt_dev.c, + common/pmu/volt/volt_pmu.c, + common/pmu/volt/volt_policy.c, + common/pmu/volt/volt_rail.c, + common/pmu/volt/volt_dev.h, + common/pmu/volt/volt_pmu.h, + common/pmu/volt/volt_policy.h, + common/pmu/volt/volt_rail.h, + include/nvgpu/pmu/volt.h ] + zbc: + safe: no + gpu: igpu + owner: Divya S + sources: [ ] + +sec2: + safe: yes + owner: Sagar K + children: + sec2: + safe: yes + gpu: dgpu + sources: [ common/sec2/sec2.c, + include/nvgpu/sec2/sec2.h, + include/nvgpu/sec2/sec2_cmn.h ] + ipc: + safe: yes + owner: Sagar K + gpu: dgpu + children: + command: + sources: [ common/sec2/ipc/sec2_cmd.c, + include/nvgpu/sec2/cmd.h ] + message: + sources: [ common/sec2/ipc/sec2_msg.c, + include/nvgpu/sec2/msg.h, + include/nvgpu/sec2/sec2_cmn.h ] + queues: + sources: [ common/sec2/ipc/sec2_queue.c, + include/nvgpu/sec2/queue.h ] + sequences: + sources: [ common/sec2/ipc/sec2_seq.c, + include/nvgpu/sec2/seq.h ] + allocator: + safe: yes + owner: Sagar K + gpu: dgpu + sources: [ common/sec2/sec2_allocator.c, + include/nvgpu/sec2/allocator.h ] + lsfm: + safe: yes + owner: Sagar K + gpu: dgpu + sources: [ common/sec2/sec2_lsfm.c, + include/nvgpu/sec2/lsfm.h ] + +sync: + safe: no + owner: Konsta H + children: + sync: + sources: [ common/sync/channel_sync.c, + common/sync/channel_sync_priv.h, + include/nvgpu/channel_sync.h ] + syncpt: + sources: [ common/sync/channel_sync_syncpt.c, + include/nvgpu/channel_sync_syncpt.h ] + syncsema: + sources: [ common/sync/channel_sync_semaphore.c, + include/nvgpu/channel_sync_semaphore.h ] +power_features: + safe: no + owner: Seema K + children: + power_features: + safe: yes + sources: [ common/power_features/power_features.c, + include/nvgpu/power_features/power_features.h ] + cg: + safe: yes + sources: [ common/power_features/cg/cg.c, + include/nvgpu/power_features/cg.h ] + pg: + safe: no + sources: [ common/power_features/pg/pg.c, + include/nvgpu/power_features/pg.h ] + +## +## HAL units. Currently they are under common but this needs to change. +## We are moving these to a top level directory. +## +hal: + safe: no + children: + !include nvgpu-hal.yaml diff --git a/arch/nvgpu-gpu_hw.yaml b/arch/nvgpu-gpu_hw.yaml new file mode 100644 index 000000000..c8c0fe702 --- /dev/null +++ b/arch/nvgpu-gpu_hw.yaml @@ -0,0 +1,224 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# Define meta elements and units for describing GPU HW interactions in +# nvgpu. +# + +headers: + safe: yes + owner: Terje B + sources: [ include/nvgpu/hw/gk20a/hw_bus_gk20a.h, + include/nvgpu/hw/gk20a/hw_ccsr_gk20a.h, + include/nvgpu/hw/gk20a/hw_ce2_gk20a.h, + include/nvgpu/hw/gk20a/hw_ctxsw_prog_gk20a.h, + include/nvgpu/hw/gk20a/hw_falcon_gk20a.h, + include/nvgpu/hw/gk20a/hw_fb_gk20a.h, + include/nvgpu/hw/gk20a/hw_fifo_gk20a.h, + include/nvgpu/hw/gk20a/hw_flush_gk20a.h, + include/nvgpu/hw/gk20a/hw_gmmu_gk20a.h, + include/nvgpu/hw/gk20a/hw_gr_gk20a.h, + include/nvgpu/hw/gk20a/hw_ltc_gk20a.h, + include/nvgpu/hw/gk20a/hw_mc_gk20a.h, + include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h, + include/nvgpu/hw/gk20a/hw_perf_gk20a.h, + include/nvgpu/hw/gk20a/hw_pram_gk20a.h, + include/nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h, + include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h, + include/nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h, + include/nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h, + include/nvgpu/hw/gk20a/hw_proj_gk20a.h, + include/nvgpu/hw/gk20a/hw_pwr_gk20a.h, + include/nvgpu/hw/gk20a/hw_ram_gk20a.h, + include/nvgpu/hw/gk20a/hw_therm_gk20a.h, + include/nvgpu/hw/gk20a/hw_timer_gk20a.h, + include/nvgpu/hw/gk20a/hw_top_gk20a.h, + include/nvgpu/hw/gk20a/hw_trim_gk20a.h, + include/nvgpu/hw/gm20b/hw_bus_gm20b.h, + include/nvgpu/hw/gm20b/hw_ccsr_gm20b.h, + include/nvgpu/hw/gm20b/hw_ce2_gm20b.h, + include/nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h, + include/nvgpu/hw/gm20b/hw_falcon_gm20b.h, + include/nvgpu/hw/gm20b/hw_fb_gm20b.h, + include/nvgpu/hw/gm20b/hw_fifo_gm20b.h, + include/nvgpu/hw/gm20b/hw_flush_gm20b.h, + include/nvgpu/hw/gm20b/hw_fuse_gm20b.h, + include/nvgpu/hw/gm20b/hw_gmmu_gm20b.h, + include/nvgpu/hw/gm20b/hw_gr_gm20b.h, + include/nvgpu/hw/gm20b/hw_ltc_gm20b.h, + include/nvgpu/hw/gm20b/hw_mc_gm20b.h, + include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h, + include/nvgpu/hw/gm20b/hw_perf_gm20b.h, + include/nvgpu/hw/gm20b/hw_pram_gm20b.h, + include/nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h, + include/nvgpu/hw/gm20b/hw_pri_ringstation_gpc_gm20b.h, + include/nvgpu/hw/gm20b/hw_pri_ringstation_sys_gm20b.h, + include/nvgpu/hw/gm20b/hw_proj_gm20b.h, + include/nvgpu/hw/gm20b/hw_pwr_gm20b.h, + include/nvgpu/hw/gm20b/hw_ram_gm20b.h, + include/nvgpu/hw/gm20b/hw_therm_gm20b.h, + include/nvgpu/hw/gm20b/hw_timer_gm20b.h, + include/nvgpu/hw/gm20b/hw_top_gm20b.h, + include/nvgpu/hw/gm20b/hw_trim_gm20b.h, + include/nvgpu/hw/gp106/hw_bus_gp106.h, + include/nvgpu/hw/gp106/hw_ccsr_gp106.h, + include/nvgpu/hw/gp106/hw_ce_gp106.h, + include/nvgpu/hw/gp106/hw_ctxsw_prog_gp106.h, + include/nvgpu/hw/gp106/hw_falcon_gp106.h, + include/nvgpu/hw/gp106/hw_fb_gp106.h, + include/nvgpu/hw/gp106/hw_fbpa_gp106.h, + include/nvgpu/hw/gp106/hw_fifo_gp106.h, + include/nvgpu/hw/gp106/hw_flush_gp106.h, + include/nvgpu/hw/gp106/hw_fuse_gp106.h, + include/nvgpu/hw/gp106/hw_gc6_gp106.h, + include/nvgpu/hw/gp106/hw_gmmu_gp106.h, + include/nvgpu/hw/gp106/hw_gr_gp106.h, + include/nvgpu/hw/gp106/hw_ltc_gp106.h, + include/nvgpu/hw/gp106/hw_mc_gp106.h, + include/nvgpu/hw/gp106/hw_pbdma_gp106.h, + include/nvgpu/hw/gp106/hw_perf_gp106.h, + include/nvgpu/hw/gp106/hw_pnvdec_gp106.h, + include/nvgpu/hw/gp106/hw_pram_gp106.h, + include/nvgpu/hw/gp106/hw_pri_ringmaster_gp106.h, + include/nvgpu/hw/gp106/hw_pri_ringstation_gpc_gp106.h, + include/nvgpu/hw/gp106/hw_pri_ringstation_sys_gp106.h, + include/nvgpu/hw/gp106/hw_proj_gp106.h, + include/nvgpu/hw/gp106/hw_psec_gp106.h, + include/nvgpu/hw/gp106/hw_pwr_gp106.h, + include/nvgpu/hw/gp106/hw_ram_gp106.h, + include/nvgpu/hw/gp106/hw_therm_gp106.h, + include/nvgpu/hw/gp106/hw_timer_gp106.h, + include/nvgpu/hw/gp106/hw_top_gp106.h, + include/nvgpu/hw/gp106/hw_trim_gp106.h, + include/nvgpu/hw/gp106/hw_xp_gp106.h, + include/nvgpu/hw/gp106/hw_xve_gp106.h, + include/nvgpu/hw/gp10b/hw_bus_gp10b.h, + include/nvgpu/hw/gp10b/hw_ccsr_gp10b.h, + include/nvgpu/hw/gp10b/hw_ce_gp10b.h, + include/nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h, + include/nvgpu/hw/gp10b/hw_falcon_gp10b.h, + include/nvgpu/hw/gp10b/hw_fb_gp10b.h, + include/nvgpu/hw/gp10b/hw_fifo_gp10b.h, + include/nvgpu/hw/gp10b/hw_flush_gp10b.h, + include/nvgpu/hw/gp10b/hw_fuse_gp10b.h, + include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h, + include/nvgpu/hw/gp10b/hw_gr_gp10b.h, + include/nvgpu/hw/gp10b/hw_ltc_gp10b.h, + include/nvgpu/hw/gp10b/hw_mc_gp10b.h, + include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h, + include/nvgpu/hw/gp10b/hw_perf_gp10b.h, + include/nvgpu/hw/gp10b/hw_pram_gp10b.h, + include/nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h, + include/nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h, + include/nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h, + include/nvgpu/hw/gp10b/hw_proj_gp10b.h, + include/nvgpu/hw/gp10b/hw_pwr_gp10b.h, + include/nvgpu/hw/gp10b/hw_ram_gp10b.h, + include/nvgpu/hw/gp10b/hw_therm_gp10b.h, + include/nvgpu/hw/gp10b/hw_timer_gp10b.h, + include/nvgpu/hw/gp10b/hw_top_gp10b.h, + include/nvgpu/hw/gv100/hw_bus_gv100.h, + include/nvgpu/hw/gv100/hw_ccsr_gv100.h, + include/nvgpu/hw/gv100/hw_ce_gv100.h, + include/nvgpu/hw/gv100/hw_ctxsw_prog_gv100.h, + include/nvgpu/hw/gv100/hw_falcon_gv100.h, + include/nvgpu/hw/gv100/hw_fb_gv100.h, + include/nvgpu/hw/gv100/hw_fifo_gv100.h, + include/nvgpu/hw/gv100/hw_flush_gv100.h, + include/nvgpu/hw/gv100/hw_fuse_gv100.h, + include/nvgpu/hw/gv100/hw_gmmu_gv100.h, + include/nvgpu/hw/gv100/hw_gr_gv100.h, + include/nvgpu/hw/gv100/hw_ioctrl_gv100.h, + include/nvgpu/hw/gv100/hw_ioctrlmif_gv100.h, + include/nvgpu/hw/gv100/hw_ltc_gv100.h, + include/nvgpu/hw/gv100/hw_mc_gv100.h, + include/nvgpu/hw/gv100/hw_minion_gv100.h, + include/nvgpu/hw/gv100/hw_nvl_gv100.h, + include/nvgpu/hw/gv100/hw_nvlinkip_discovery_gv100.h, + include/nvgpu/hw/gv100/hw_nvlipt_gv100.h, + include/nvgpu/hw/gv100/hw_nvtlc_gv100.h, + include/nvgpu/hw/gv100/hw_pbdma_gv100.h, + include/nvgpu/hw/gv100/hw_perf_gv100.h, + include/nvgpu/hw/gv100/hw_pgsp_gv100.h, + include/nvgpu/hw/gv100/hw_pram_gv100.h, + include/nvgpu/hw/gv100/hw_pri_ringmaster_gv100.h, + include/nvgpu/hw/gv100/hw_pri_ringstation_gpc_gv100.h, + include/nvgpu/hw/gv100/hw_pri_ringstation_sys_gv100.h, + include/nvgpu/hw/gv100/hw_proj_gv100.h, + include/nvgpu/hw/gv100/hw_pwr_gv100.h, + include/nvgpu/hw/gv100/hw_ram_gv100.h, + include/nvgpu/hw/gv100/hw_therm_gv100.h, + include/nvgpu/hw/gv100/hw_timer_gv100.h, + include/nvgpu/hw/gv100/hw_top_gv100.h, + include/nvgpu/hw/gv100/hw_trim_gv100.h, + include/nvgpu/hw/gv100/hw_usermode_gv100.h, + include/nvgpu/hw/gv100/hw_xp_gv100.h, + include/nvgpu/hw/gv100/hw_xve_gv100.h, + include/nvgpu/hw/gv11b/hw_bus_gv11b.h, + include/nvgpu/hw/gv11b/hw_ccsr_gv11b.h, + include/nvgpu/hw/gv11b/hw_ce_gv11b.h, + include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h, + include/nvgpu/hw/gv11b/hw_falcon_gv11b.h, + include/nvgpu/hw/gv11b/hw_fb_gv11b.h, + include/nvgpu/hw/gv11b/hw_fifo_gv11b.h, + include/nvgpu/hw/gv11b/hw_flush_gv11b.h, + include/nvgpu/hw/gv11b/hw_fuse_gv11b.h, + include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h, + include/nvgpu/hw/gv11b/hw_gr_gv11b.h, + include/nvgpu/hw/gv11b/hw_ltc_gv11b.h, + include/nvgpu/hw/gv11b/hw_mc_gv11b.h, + include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h, + include/nvgpu/hw/gv11b/hw_perf_gv11b.h, + include/nvgpu/hw/gv11b/hw_pram_gv11b.h, + include/nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h, + include/nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h, + include/nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h, + include/nvgpu/hw/gv11b/hw_proj_gv11b.h, + include/nvgpu/hw/gv11b/hw_pwr_gv11b.h, + include/nvgpu/hw/gv11b/hw_ram_gv11b.h, + include/nvgpu/hw/gv11b/hw_therm_gv11b.h, + include/nvgpu/hw/gv11b/hw_timer_gv11b.h, + include/nvgpu/hw/gv11b/hw_top_gv11b.h, + include/nvgpu/hw/gv11b/hw_usermode_gv11b.h, + include/nvgpu/hw/tu104/hw_bus_tu104.h, + include/nvgpu/hw/tu104/hw_ccsr_tu104.h, + include/nvgpu/hw/tu104/hw_ce_tu104.h, + include/nvgpu/hw/tu104/hw_ctrl_tu104.h, + include/nvgpu/hw/tu104/hw_ctxsw_prog_tu104.h, + include/nvgpu/hw/tu104/hw_falcon_tu104.h, + include/nvgpu/hw/tu104/hw_fb_tu104.h, + include/nvgpu/hw/tu104/hw_fbpa_tu104.h, + include/nvgpu/hw/tu104/hw_fifo_tu104.h, + include/nvgpu/hw/tu104/hw_flush_tu104.h, + include/nvgpu/hw/tu104/hw_func_tu104.h, + include/nvgpu/hw/tu104/hw_fuse_tu104.h, + include/nvgpu/hw/tu104/hw_gc6_tu104.h, + include/nvgpu/hw/tu104/hw_gmmu_tu104.h, + include/nvgpu/hw/tu104/hw_gr_tu104.h, + include/nvgpu/hw/tu104/hw_ioctrl_tu104.h, + include/nvgpu/hw/tu104/hw_ioctrlmif_tu104.h, + include/nvgpu/hw/tu104/hw_ltc_tu104.h, + include/nvgpu/hw/tu104/hw_mc_tu104.h, + include/nvgpu/hw/tu104/hw_minion_tu104.h, + include/nvgpu/hw/tu104/hw_nvl_tu104.h, + include/nvgpu/hw/tu104/hw_nvlinkip_discovery_tu104.h, + include/nvgpu/hw/tu104/hw_nvlipt_tu104.h, + include/nvgpu/hw/tu104/hw_nvtlc_tu104.h, + include/nvgpu/hw/tu104/hw_pbdma_tu104.h, + include/nvgpu/hw/tu104/hw_perf_tu104.h, + include/nvgpu/hw/tu104/hw_pgsp_tu104.h, + include/nvgpu/hw/tu104/hw_pnvdec_tu104.h, + include/nvgpu/hw/tu104/hw_pram_tu104.h, + include/nvgpu/hw/tu104/hw_pri_ringmaster_tu104.h, + include/nvgpu/hw/tu104/hw_pri_ringstation_gpc_tu104.h, + include/nvgpu/hw/tu104/hw_pri_ringstation_sys_tu104.h, + include/nvgpu/hw/tu104/hw_proj_tu104.h, + include/nvgpu/hw/tu104/hw_psec_tu104.h, + include/nvgpu/hw/tu104/hw_pwr_tu104.h, + include/nvgpu/hw/tu104/hw_ram_tu104.h, + include/nvgpu/hw/tu104/hw_therm_tu104.h, + include/nvgpu/hw/tu104/hw_timer_tu104.h, + include/nvgpu/hw/tu104/hw_top_tu104.h, + include/nvgpu/hw/tu104/hw_trim_tu104.h, + include/nvgpu/hw/tu104/hw_usermode_tu104.h, + include/nvgpu/hw/tu104/hw_xp_tu104.h, + include/nvgpu/hw/tu104/hw_xve_tu104.h ] diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml new file mode 100644 index 000000000..10ee1bdec --- /dev/null +++ b/arch/nvgpu-hal-new.yaml @@ -0,0 +1,547 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# HAL units. These are the units that have access to HW. +# + +bus: + safe: yes + owner: Terje B + sources: [ hal/bus/bus_gk20a.c, hal/bus/bus_gk20a.h, + hal/bus/bus_gm20b.c, hal/bus/bus_gm20b.h, + hal/bus/bus_gp10b.c, hal/bus/bus_gp10b.h, + hal/bus/bus_gv100.c, hal/bus/bus_gv100.h, + hal/bus/bus_tu104.c, hal/bus/bus_tu104.h ] + +ltc: + safe: yes + owner: Seshendra G + sources: [ hal/ltc/ltc_gm20b.c, + hal/ltc/ltc_gm20b.h, + hal/ltc/ltc_gp10b.c, + hal/ltc/ltc_gp10b.h, + hal/ltc/ltc_gv11b.c, + hal/ltc/ltc_gv11b.h, + hal/ltc/ltc_tu104.c, + hal/ltc/ltc_tu104.h ] + +init: + safe: yes + owner: Philip E + sources: [ hal/init/hal_gm20b.c, + hal/init/hal_gm20b.h, + hal/init/hal_gp10b.c, + hal/init/hal_gp10b.h, + hal/init/hal_gv100.c, + hal/init/hal_gv100.h, + hal/init/hal_gv11b.c, + hal/init/hal_gv11b.h, + hal/init/hal_init.c, + hal/init/hal_tu104.c, + hal/init/hal_tu104.h ] + +priv_ring: + safe: yes + owner: Seema K + sources: [ hal/priv_ring/priv_ring_gm20b.c, + hal/priv_ring/priv_ring_gm20b.h, + hal/priv_ring/priv_ring_gp10b.c, + hal/priv_ring/priv_ring_gp10b.h ] + +ptimer: + safe: yes + owner: Terje B + sources: [ hal/ptimer/ptimer_gk20a.c, + hal/ptimer/ptimer_gk20a.h ] + +cg: + safe: yes + owner: Seema K + sources: [ hal/power_features/cg/gating_reglist.h, + hal/power_features/cg/gm20b_gating_reglist.c, + hal/power_features/cg/gm20b_gating_reglist.h, + hal/power_features/cg/gp106_gating_reglist.c, + hal/power_features/cg/gp106_gating_reglist.h, + hal/power_features/cg/gp10b_gating_reglist.c, + hal/power_features/cg/gp10b_gating_reglist.h, + hal/power_features/cg/gv100_gating_reglist.c, + hal/power_features/cg/gv100_gating_reglist.h, + hal/power_features/cg/gv11b_gating_reglist.c, + hal/power_features/cg/gv11b_gating_reglist.h, + hal/power_features/cg/tu104_gating_reglist.c, + hal/power_features/cg/tu104_gating_reglist.h ] +rc: + safe: no + owner: Seema K + sources: [ hal/rc/rc_gk20a.c, + hal/rc/rc_gk20a.h, + hal/rc/rc_gv11b.c, + hal/rc/rc_gv11b.h ] + +fbpa: + safe: yes + owner: Seshendra G + sources: [ hal/fbpa/fbpa_tu104.c, hal/fbpa/fbpa_tu104.h ] + +clk: + safe: yes + owner: Ramesh M + gpu: igpu + sources: [ hal/clk/clk_gk20a.h, + hal/clk/clk_gm20b.c, + hal/clk/clk_gm20b.h, + hal/clk/clk_gv100.c, + hal/clk/clk_gv100.h ] + + +fifo: + safe: yes + owner: Seema K + children: + userd: + safe: no + sources: [ hal/fifo/userd_gk20a.c, + hal/fifo/userd_gk20a.h, + hal/fifo/userd_gv11b.c, + hal/fifo/userd_gv11b.h ] + ramfc: + safe: yes + sources: [ hal/fifo/ramfc_gk20a.c, + hal/fifo/ramfc_gk20a.h, + hal/fifo/ramfc_gp10b.c, + hal/fifo/ramfc_gp10b.h, + hal/fifo/ramfc_gv11b.c, + hal/fifo/ramfc_gv11b.h, + hal/fifo/ramfc_tu104.c, + hal/fifo/ramfc_tu104.h ] + ramin: + safe: yes + sources: [ hal/fifo/ramin_gp10b.h, + hal/fifo/ramin_gk20a.h, + hal/fifo/ramin_gv11b.h, + hal/fifo/ramin_gm20b.h, + hal/fifo/ramin_gv11b.c, + hal/fifo/ramin_gp10b.c, + hal/fifo/ramin_gm20b.c, + hal/fifo/ramin_gk20a.c ] + runlist: + safe: yes + sources: [ hal/fifo/runlist_fifo_gk20a.c, + hal/fifo/runlist_fifo_gk20a.h, + hal/fifo/runlist_fifo_gv100.c, + hal/fifo/runlist_fifo_gv100.h, + hal/fifo/runlist_fifo_gv11b.c, + hal/fifo/runlist_fifo_gv11b.h, + hal/fifo/runlist_fifo_tu104.c, + hal/fifo/runlist_fifo_tu104.h, + hal/fifo/runlist_ram_gk20a.c, + hal/fifo/runlist_ram_gk20a.h, + hal/fifo/runlist_ram_gv11b.c, + hal/fifo/runlist_ram_gv11b.h, + hal/fifo/runlist_ram_tu104.c, + hal/fifo/runlist_ram_tu104.h ] + + tsg: + safe: yes + sources: [ hal/fifo/tsg_gv11b.h, + hal/fifo/tsg_gv11b.c, + hal/fifo/tsg_gk20a.h, + hal/fifo/tsg_gk20a.c ] + fifo: + safe: yes + sources: [ hal/fifo/fifo_intr_gk20a.c, + hal/fifo/fifo_intr_gk20a.h, + hal/fifo/fifo_intr_gv11b.c, + hal/fifo/fifo_intr_gv11b.h, + hal/fifo/fifo_intr_gv100.c, + hal/fifo/fifo_intr_gv100.h, + hal/fifo/ctxsw_timeout_gk20a.c, + hal/fifo/ctxsw_timeout_gk20a.h, + hal/fifo/ctxsw_timeout_gv11b.c, + hal/fifo/ctxsw_timeout_gv11b.h, + hal/fifo/mmu_fault_gk20a.c, + hal/fifo/mmu_fault_gk20a.h, + hal/fifo/mmu_fault_gm20b.c, + hal/fifo/mmu_fault_gm20b.h, + hal/fifo/mmu_fault_gp10b.c, + hal/fifo/mmu_fault_gp10b.h, + hal/fifo/fifo_gk20a.c, + hal/fifo/fifo_gk20a.h, + hal/fifo/fifo_gv11b.c, + hal/fifo/fifo_gv11b.h, + hal/fifo/fifo_tu104.c, + hal/fifo/fifo_tu104.h ] + engine_status: + safe: yes + sources: [ hal/fifo/engine_status_gm20b.c, + hal/fifo/engine_status_gm20b.h, + hal/fifo/engine_status_gv100.c, + hal/fifo/engine_status_gv100.h ] + + engines: + safe: yes + sources: [ hal/fifo/engines_gm20b.c, + hal/fifo/engines_gm20b.h, + hal/fifo/engines_gp10b.c, + hal/fifo/engines_gp10b.h, + hal/fifo/engines_gv11b.c, + hal/fifo/engines_gv11b.h ] + + pbdma_status: + safe: yes + sources: [ hal/fifo/pbdma_status_gm20b.c, + hal/fifo/pbdma_status_gm20b.h ] + preempt: + safe: yes + sources: [ hal/fifo/preempt_gk20a.c, + hal/fifo/preempt_gk20a.h, + hal/fifo/preempt_gv11b.c, + hal/fifo/preempt_gv11b.h ] +fuse: + safe: yes + owner: Seema K + sources: [ hal/fuse/fuse_gm20b.c, + hal/fuse/fuse_gm20b.h, + hal/fuse/fuse_gp106.c, + hal/fuse/fuse_gp106.h, + hal/fuse/fuse_gp10b.c, + hal/fuse/fuse_gp10b.h ] + +mm: + safe: yes + owner: Alex W + children: + gmmu: + safe: yes + sources: [ hal/mm/gmmu/gmmu_gk20a.c, + hal/mm/gmmu/gmmu_gk20a.h, + hal/mm/gmmu/gmmu_gm20b.c, + hal/mm/gmmu/gmmu_gm20b.h, + hal/mm/gmmu/gmmu_gp10b.c, + hal/mm/gmmu/gmmu_gp10b.h, + hal/mm/gmmu/gmmu_gv11b.c, + hal/mm/gmmu/gmmu_gv11b.h ] + cache: + safe: yes + sources: [ hal/mm/cache/flush_gk20a.c, + hal/mm/cache/flush_gk20a.h, + hal/mm/cache/flush_gv11b.c, + hal/mm/cache/flush_gv11b.h ] + mmu_fault: + safe: yes + sources: [ hal/mm/mmu_fault/mmu_fault_gv11b.c, + hal/mm/mmu_fault/mmu_fault_gv11b.h ] + mm: + safe: yes + sources: [ hal/mm/mm_gk20a.c, + hal/mm/mm_gk20a.h, + hal/mm/mm_gm20b.c, + hal/mm/mm_gm20b.h, + hal/mm/mm_gp10b.c, + hal/mm/mm_gp10b.h, + hal/mm/mm_gv11b.c, + hal/mm/mm_gv11b.h, + hal/mm/mm_gv100.c, + hal/mm/mm_gv100.h, + hal/mm/mm_tu104.c, + hal/mm/mm_tu104.h] + +sync: + safe: no + owner: Thomas F + children: + sema: + sources: [ hal/sync/sema_cmdbuf_gk20a.c, + hal/sync/sema_cmdbuf_gk20a.h, + hal/sync/sema_cmdbuf_gv11b.c, + hal/sync/sema_cmdbuf_gv11b.h ] + syncpt: + sources: [ hal/sync/syncpt_cmdbuf_gk20a.c, + hal/sync/syncpt_cmdbuf_gk20a.h, + hal/sync/syncpt_cmdbuf_gv11b.c, + hal/sync/syncpt_cmdbuf_gv11b.h ] + +therm: + safe: yes + owner: Seshendra G + sources: [ hal/therm/therm_gm20b.c, + hal/therm/therm_gm20b.h, + hal/therm/therm_gp106.c, + hal/therm/therm_gp106.h, + hal/therm/therm_gp10b.c, + hal/therm/therm_gp10b.h, + hal/therm/therm_gv11b.c, + hal/therm/therm_gv11b.h ] + +cbc: + safe: no + owner: Seshendra G + sources: [ hal/cbc/cbc_gm20b.c, + hal/cbc/cbc_gm20b.h, + hal/cbc/cbc_gp10b.c, + hal/cbc/cbc_gp10b.h, + hal/cbc/cbc_gv11b.c, + hal/cbc/cbc_gv11b.h, + hal/cbc/cbc_tu104.c, + hal/cbc/cbc_tu104.h ] + +ce: + safe: yes + owner: Thomas F + sources: [ hal/ce/ce2_gk20a.c, + hal/ce/ce2_gk20a.h, + hal/ce/ce_gp10b.c, + hal/ce/ce_gp10b.h, + hal/ce/ce_gv11b.c, + hal/ce/ce_gv11b.h ] + +gr: + safe: yes + owner: Deepak N + children: + ecc: + safe: yes + sources: [hal/gr/ecc/ecc_gp10b.c, + hal/gr/ecc/ecc_gv11b.c, + hal/gr/ecc/ecc_tu104.c, + hal/gr/ecc/ecc_gp10b.h, + hal/gr/ecc/ecc_gv11b.h, + hal/gr/ecc/ecc_tu104.h] + ctxsw_prog: + safe: yes + sources: [ hal/gr/ctxsw_prog/ctxsw_prog_gm20b.c, + hal/gr/ctxsw_prog/ctxsw_prog_gm20b.h, + hal/gr/ctxsw_prog/ctxsw_prog_gp10b.c, + hal/gr/ctxsw_prog/ctxsw_prog_gp10b.h, + hal/gr/ctxsw_prog/ctxsw_prog_gv11b.c, + hal/gr/ctxsw_prog/ctxsw_prog_gv11b.h ] + config: + safe: yes + sources: [ hal/gr/config/gr_config_gm20b.c, + hal/gr/config/gr_config_gm20b.h, + hal/gr/config/gr_config_gv100.c, + hal/gr/config/gr_config_gv100.h ] + init: + safe: yes + sources: [ hal/gr/init/gr_init_gm20b.c, + hal/gr/init/gr_init_gm20b.h, + hal/gr/init/gr_init_gp10b.c, + hal/gr/init/gr_init_gp10b.h, + hal/gr/init/gr_init_gv100.c, + hal/gr/init/gr_init_gv100.h, + hal/gr/init/gr_init_gv11b.c, + hal/gr/init/gr_init_gv11b.h, + hal/gr/init/gr_init_tu104.c, + hal/gr/init/gr_init_tu104.h ] + intr: + safe: yes + sources: [ hal/gr/intr/gr_intr_gm20b.c, + hal/gr/intr/gr_intr_gm20b.h, + hal/gr/intr/gr_intr_gp10b.c, + hal/gr/intr/gr_intr_gp10b.h, + hal/gr/intr/gr_intr_gv11b.c, + hal/gr/intr/gr_intr_gv11b.h, + hal/gr/intr/gr_intr_tu104.c, + hal/gr/intr/gr_intr_tu104.h ] + falcon: + safe: yes + sources: [ hal/gr/falcon/gr_falcon_gm20b.c, + hal/gr/falcon/gr_falcon_gm20b.h, + hal/gr/falcon/gr_falcon_gp10b.c, + hal/gr/falcon/gr_falcon_gp10b.h, + hal/gr/falcon/gr_falcon_gv11b.c, + hal/gr/falcon/gr_falcon_gv11b.h ] + fecs_trace: + safe: no + sources: [ hal/gr/fecs_trace/fecs_trace_gm20b.c, + hal/gr/fecs_trace/fecs_trace_gm20b.h, + hal/gr/fecs_trace/fecs_trace_gm20b.h, + hal/gr/fecs_trace/fecs_trace_gp10b.c, + hal/gr/fecs_trace/fecs_trace_gp10b.h, + hal/gr/fecs_trace/fecs_trace_gv11b.c, + hal/gr/fecs_trace/fecs_trace_gv11b.h ] + hwpm_map: + safe: no + sources: [ hal/gr/hwpm_map/hwpm_map_gv100.c, + hal/gr/hwpm_map/hwpm_map_gv100.h ] + zbc: + safe: no + sources: [ hal/gr/zbc/zbc_gm20b.c, + hal/gr/zbc/zbc_gm20b.h, + hal/gr/zbc/zbc_gp10b.c, + hal/gr/zbc/zbc_gp10b.h, + hal/gr/zbc/zbc_gv11b.c, + hal/gr/zbc/zbc_gv11b.h ] + zcull: + safe: no + sources: [ hal/gr/zcull/zcull_gm20b.c, + hal/gr/zcull/zcull_gm20b.h, + hal/gr/zcull/zcull_gv11b.c, + hal/gr/zcull/zcull_gv11b.h ] + gr: + safe: no + sources: [ hal/gr/gr/gr_gk20a.c, hal/gr/gr/gr_gk20a.h, + hal/gr/gr/gr_gm20b.c, hal/gr/gr/gr_gm20b.h, + hal/gr/gr/gr_gp10b.c, hal/gr/gr/gr_gp10b.h, + hal/gr/gr/gr_gv100.c, hal/gr/gr/gr_gv100.h, + hal/gr/gr/gr_gv11b.c, hal/gr/gr/gr_gv11b.h, + hal/gr/gr/gr_tu104.c, hal/gr/gr/gr_tu104.h, + include/nvgpu/gr/warpstate.h, + hal/gr/gr/gr_pri_gk20a.h, + hal/gr/gr/gr_pri_gv11b.h ] + +regops: + safe: no + owner: Deepak N + sources: [ hal/regops/regops_gm20b.c, + hal/regops/regops_gm20b.h, + hal/regops/regops_gp10b.c, + hal/regops/regops_gp10b.h, + hal/regops/regops_gv100.c, + hal/regops/regops_gv100.h, + hal/regops/regops_gv11b.c, + hal/regops/regops_gv11b.h, + hal/regops/regops_tu104.c, + hal/regops/regops_tu104.h ] + +falcon: + safe: yes + owner: Sagar K + sources: [ hal/falcon/falcon_gk20a.c, + hal/falcon/falcon_gk20a.h ] + +mc: + safe: yes + owner: Seema K + sources: [ hal/mc/mc_gm20b.c, + hal/mc/mc_gm20b.h, + hal/mc/mc_gp10b.c, + hal/mc/mc_gp10b.h, + hal/mc/mc_gv100.c, + hal/mc/mc_gv100.h, + hal/mc/mc_gv11b.c, + hal/mc/mc_gv11b.h, + hal/mc/mc_tu104.c, + hal/mc/mc_tu104.h ] + +fb: + safe: yes + owner: Seshendra G + sources: [ hal/fb/fb_gm20b.c, hal/fb/fb_gm20b.h, + hal/fb/fb_gp106.c, hal/fb/fb_gp106.h, + hal/fb/fb_gp10b.c, hal/fb/fb_gp10b.h, + hal/fb/fb_gv100.c, hal/fb/fb_gv100.h, + hal/fb/fb_gv11b.c, hal/fb/fb_gv11b.h, + hal/fb/fb_tu104.c, hal/fb/fb_tu104.h, + hal/fb/intr/fb_intr_gv100.h, hal/fb/intr/fb_intr_gv100.c, + hal/fb/intr/fb_intr_gv11b.h, hal/fb/intr/fb_intr_gv11b.c, + hal/fb/fb_mmu_fault_gv11b.h, hal/fb/fb_mmu_fault_gv11b.c, + hal/fb/fb_mmu_fault_tu104.h, hal/fb/fb_mmu_fault_tu104.c, + hal/fb/intr/fb_intr_ecc_gv11b.h, hal/fb/intr/fb_intr_ecc_gv11b.c ] + +pmu: + safe: yes + owner: Mahantesh K + sources: [ hal/pmu/pmu_gk20a.c, + hal/pmu/pmu_gk20a.h, + hal/pmu/pmu_gm20b.c, + hal/pmu/pmu_gm20b.h, + hal/pmu/pmu_gp106.c, + hal/pmu/pmu_gp106.h, + hal/pmu/pmu_gp10b.c, + hal/pmu/pmu_gp10b.h, + hal/pmu/pmu_gv11b.c, + hal/pmu/pmu_gv11b.h, + hal/pmu/pmu_tu104.c, + hal/pmu/pmu_tu104.h ] + +perf: + safe: yes + owner: Abdul S + gpu: dgpu + sources: [ hal/perf/perf_gv100.c, + hal/perf/perf_gv100.h, + hal/perf/perf_tu104.c, + hal/perf/perf_tu104.h ] + +nvlink: + safe: yes + gpu: dgpu + sources: [ hal/nvlink/link_mode_transitions_gv100.c, + hal/nvlink/link_mode_transitions_gv100.h, + hal/nvlink/link_mode_transitions_tu104.c, + hal/nvlink/link_mode_transitions_tu104.h, + hal/nvlink/minion_gv100.c, + hal/nvlink/minion_gv100.h, + hal/nvlink/minion_tu104.c, + hal/nvlink/minion_tu104.h ] + +sec2: + safe: yes + owner: Sagar K + gpu: dgpu + sources: [ hal/sec2/sec2_gp106.c, + hal/sec2/sec2_gp106.h, + hal/sec2/sec2_tu104.c, + hal/sec2/sec2_tu104.h ] + +netlist: + safe: yes + owner: Seshendra G + gpu: both + sources: [ hal/netlist/netlist_gm20b.c, + hal/netlist/netlist_gm20b.h, + hal/netlist/netlist_gp10b.c, + hal/netlist/netlist_gp10b.h, + hal/netlist/netlist_gv100.c, + hal/netlist/netlist_gv100.h, + hal/netlist/netlist_gv11b.c, + hal/netlist/netlist_gv11b.h, + hal/netlist/netlist_tu104.c, + hal/netlist/netlist_tu104.h ] + +perf: + safe: no + owner: Deepak N + sources: [ hal/perf/perf_gm20b.c, + hal/perf/perf_gm20b.h, + hal/perf/perf_gv11b.c, + hal/perf/perf_gv11b.h ] + +class: + safe: yes + owner: Seshendra G + sources: [ hal/class/class_gm20b.c, + hal/class/class_gm20b.h, + hal/class/class_gp10b.c, + hal/class/class_gp10b.h, + hal/class/class_gv11b.c, + hal/class/class_gv11b.h, + hal/class/class_tu104.c, + hal/class/class_tu104.h ] + +func: + safe: yes + owner: Terje B + sources: [ hal/func/func_tu104.c, + hal/func/func_tu104.h ] + +top: + safe: yes + owner: Tejal K + gpu: igpu + sources: [ include/nvgpu/top.h, + hal/top/top_gm20b.c, + hal/top/top_gm20b.h, + hal/top/top_gp10b.c, + hal/top/top_gp10b.h, + hal/top/top_gv100.c, + hal/top/top_gv100.h, + hal/top/top_gv11b.c, + hal/top/top_gv11b.h ] + +bios: + safe: yes + owner: Tejal + gpu: dgpu + sources: [ hal/bios/bios_tu104.c, + hal/bios/bios_tu104.h ] diff --git a/arch/nvgpu-hal.yaml b/arch/nvgpu-hal.yaml new file mode 100644 index 000000000..b55fe0c87 --- /dev/null +++ b/arch/nvgpu-hal.yaml @@ -0,0 +1,94 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# HAL units. These are the units that have access to HW. +# + +init: + safe: yes + owner: Terje B + sources: [ include/nvgpu/hal_init.h ] + +gr: + safe: yes + owner: Deepak N + children: + err_ops: + safe: yes + sources: [ ] + +pmu_ver: + safe: yes + children: + boardobj: + safe: yes + owner: Mahantesh K + gpu: dgpu + sources: [ ] + + volt: + safe: yes + owner: Mahantesh K + gpu: dgpu + sources: [ ] + + clk: + safe: yes + owner: Ramesh M + gpu: dgpu + sources: [ ] + + +pramin: + safe: yes + owner: Terje B + sources: [ ] + +pmu: + children: + err_ops: + safe: yes + owner: Mahantesh K + sources: [ ] + +pmu_perf: + safe: yes + owner: Abdul S + gpu: dgpu + sources: [ ] + +debug: + safe: yes + owner: Deepak N + sources: [ ] + +debugger: + safe: no + owner: Deepak N + sources: [ ] + +perfbuf: + safe: no + owner: Deepak N + sources: [ ] + +css: + safe: no + owner: Deepak N + sources: [ ] + +xve: + safe: yes + owner: Alex W + gpu: dgpu + sources: [ include/nvgpu/xve.h, + common/xve/xve_gp106.c, + common/xve/xve_gp106.h ] + +nvlink: + safe: yes + owner: Tejal K + gpu: dgpu + sources: [ common/nvlink/nvlink_gv100.c, + common/nvlink/nvlink_gv100.h, + common/nvlink/nvlink_tu104.c, + common/nvlink/nvlink_tu104.h ] diff --git a/arch/nvgpu-interface.yaml b/arch/nvgpu-interface.yaml new file mode 100644 index 000000000..f81dbed2a --- /dev/null +++ b/arch/nvgpu-interface.yaml @@ -0,0 +1,133 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# OS interface units and utilities. Often represented by simply a header file. +# + +atomic: + safe: yes + sources: [ include/nvgpu/atomic.h ] + +barrier: + safe: yes + sources: [ include/nvgpu/barrier.h ] + +bitops: + safe: yes + sources: [ include/nvgpu/bitops.h ] + +bsearch: + safe: yes + sources: [ include/nvgpu/bsearch.h ] + +bug: + safe: yes + sources: [ include/nvgpu/bug.h ] + +circ_buf: + safe: yes + sources: [ include/nvgpu/circ_buf.h ] + +cond: + safe: yes + sources: [ include/nvgpu/cond.h ] + +dma: + safe: yes + sources: [ include/nvgpu/dma.h ] + +# This one is likely not structured correctly. +dt: + safe: yes + sources: [ include/nvgpu/dt.h ] + +# Also a problem. +errno: + safe: yes + sources: [ include/nvgpu/errno.h ] + +firmware: + safe: yes + sources: [ include/nvgpu/firmware.h ] + +fuse: + safe: yes + sources: [ include/nvgpu/fuse.h ] + +io: + safe: yes + sources: [ include/nvgpu/io.h, include/nvgpu/io_usermode.h ] + +kmem: + safe: yes + sources: [ include/nvgpu/kmem.h ] + +kref: + safe: yes + sources: [ include/nvgpu/kref.h ] + +list: + safe: yes + sources: [ include/nvgpu/list.h ] + tags: unit-testable + +lock: + safe: yes + sources: [ include/nvgpu/lock.h ] + +log: + safe: yes + sources: [ include/nvgpu/log.h ] + +log2: + safe: yes + sources: [ include/nvgpu/log2.h ] + +rbtree: + safe: yes + sources: [ include/nvgpu/rbtree.h ] + tags: unit-testable + +rwsem: + safe: yes + sources: [ include/nvgpu/rwsem.h ] + +sizes: + safe: yes + sources: [ include/nvgpu/sizes.h ] + +soc: + safe: yes + sources: [ include/nvgpu/soc.h ] + +sort: + safe: yes + sources: [ include/nvgpu/sort.h ] + +string: + safe: yes + sources: [ include/nvgpu/string.h ] + tags: unit-testable + +thread: + safe: yes + sources: [ include/nvgpu/thread.h ] + +timers: + safe: yes + sources: [ include/nvgpu/timers.h ] + +types: + safe: yes + sources: [ include/nvgpu/types.h ] + +nvgpu_sgt: + safe: yes + sources: [ include/nvgpu/nvgpu_sgt_os.h ] + +os_sched: + safe: no + sources: [ include/nvgpu/os_sched.h ] + +nvhost: + safe: yes + sources: [ include/nvgpu/nvhost.h ] diff --git a/arch/nvgpu-linux.yaml b/arch/nvgpu-linux.yaml new file mode 100644 index 000000000..9689ac743 --- /dev/null +++ b/arch/nvgpu-linux.yaml @@ -0,0 +1,235 @@ +# +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# Linux elements and units in nvgpu. +# +# The safe: tag is ommited through out since all Linux units are by definition +# not safe. +# +# I also have not put a huge amount of thought into this since none of this +# code is "safe" code. Nor are we planning on spending a lot of effort to +# clean this up. At least not yet. + +bsearch: + sources: [ os/linux/bsearch.c ] + +channel: + sources: [ os/linux/linux-channel.c, os/linux/channel.h ] + +clk: + sources: [ os/linux/clk.c, os/linux/clk.h ] + +cde: + sources: [ os/linux/cde.c, os/linux/cde.h, + os/linux/cde_gm20b.c, os/linux/cde_gm20b.h, + os/linux/cde_gp10b.c, os/linux/cde_gp10b.h ] + +comptags: + sources: [ os/linux/comptags.c ] + +cond: + sources: [ os/linux/cond.c ] + +dma: + sources: [ os/linux/linux-dma.c ] + +dmabuf: + sources: [ os/linux/dmabuf.c, os/linux/dmabuf_vidmem.c, + os/linux/dmabuf.h, os/linux/dmabuf_vidmem.h ] + +driver_common: + sources: [ os/linux/driver_common.c, os/linux/driver_common.h ] + +dt: + sources: [ os/linux/dt.c ] + +debug: + sources: [ os/linux/debug.c, + os/linux/debug_allocator.c, + os/linux/debug_allocator.h, + os/linux/debug_bios.c, + os/linux/debug_bios.h, + os/linux/debug_cde.c, + os/linux/debug_cde.h, + os/linux/debug_ce.c, + os/linux/debug_ce.h, + os/linux/debug_clk_gm20b.c, + os/linux/debug_clk_gm20b.h, + os/linux/debug_clk_gv100.c, + os/linux/debug_clk_gv100.h, + os/linux/debug_fecs_trace.c, + os/linux/debug_fecs_trace.h, + os/linux/debug_fifo.c, + os/linux/debug_fifo.h, + os/linux/debug_gr.c, + os/linux/debug_gr.h, + os/linux/debug_hal.c, + os/linux/debug_hal.h, + os/linux/debug_kmem.c, + os/linux/debug_kmem.h, + os/linux/debug_ltc.c, + os/linux/debug_ltc.h, + os/linux/debug_pmgr.c, + os/linux/debug_pmgr.h, + os/linux/debug_pmu.c, + os/linux/debug_pmu.h, + os/linux/debug_sched.c, + os/linux/debug_sched.h, + os/linux/debug_therm_gp106.c, + os/linux/debug_therm_gp106.h, + os/linux/debug_xve.c, + os/linux/debug_xve.h, + os/linux/debug_s_param.c, + os/linux/debug_s_param.h, + os/linux/debug_volt.c, + os/linux/debug_volt.h, + os/linux/fecs_trace_linux.c, + os/linux/fecs_trace_linux.h, + os/linux/linux-cbc.c, + os/linux/nvlink_probe.c ] + +firmware: + sources: [ os/linux/firmware.c ] + +fuse: + sources: [ os/linux/fuse.c ] + +intr: + sources: [ os/linux/intr.c, os/linux/intr.h ] + +io: + sources: [ os/linux/io_usermode.c ] + +ioctl: + sources: [ os/linux/ioctl.c, + os/linux/ioctl.h, + os/linux/ioctl_as.c, + os/linux/ioctl_as.h, + os/linux/ioctl_channel.c, + os/linux/ioctl_channel.h, + os/linux/ioctl_clk_arb.c, + os/linux/ioctl_ctrl.c, + os/linux/ioctl_ctrl.h, + os/linux/ioctl_dbg.c, + os/linux/ioctl_dbg.h, + os/linux/ioctl_tsg.c, + os/linux/ioctl_tsg.h ] + +kmem: + sources: [ os/linux/kmem.c, os/linux/kmem_priv.h ] + +log: + sources: [ os/linux/log.c ] + +module: + sources: [ os/linux/module.c, os/linux/module.h, + os/linux/module_usermode.c, os/linux/module_usermode.h ] + +nvgpu_mem: + sources: [ os/linux/nvgpu_mem.c ] + +nvhost: + sources: [ os/linux/nvhost.c, + os/linux/nvhost_priv.h ] + +nvidia_p2p: + sources: [ os/linux/nvidia_p2p.c ] + +nvlink: + sources: [ os/linux/nvlink.c, + os/linux/nvlink.h ] + +fence: + sources: [ os/linux/os_fence_android.c, + os/linux/os_fence_android_sema.c, + os/linux/os_fence_android_syncpt.c, + os/linux/sync_sema_android.c, + os/linux/sync_sema_android.h, + include/nvgpu/os_fence.h, + include/nvgpu/os_fence_semas.h, + include/nvgpu/os_fence_syncpts.h ] + +ops: + sources: [ os/linux/os_ops.c, os/linux/os_ops.h, + os/linux/os_ops_gm20b.c, os/linux/os_ops_gm20b.h, + os/linux/os_ops_gp10b.c, os/linux/os_ops_gp10b.h, + os/linux/os_ops_gv100.c, os/linux/os_ops_gv100.h, + os/linux/os_ops_gv11b.c, os/linux/os_ops_gv11b.h, + os/linux/os_ops_tu104.c, os/linux/os_ops_tu104.h ] + +pci: + sources: [ os/linux/pci.c, + os/linux/pci.h, + os/linux/pci_power.c, + os/linux/pci_power.h, + include/nvgpu/pci.h ] + +platform: + sources: [ os/linux/platform_gk20a.h, + os/linux/platform_gk20a_tegra.c, + os/linux/platform_gk20a_tegra.h, + os/linux/platform_gp10b.h, + os/linux/platform_gp10b_tegra.c, + os/linux/platform_gp10b_tegra.h, + os/linux/platform_gv11b_tegra.c ] + +rwsem: + sources: [ os/linux/rwsem.c ] + +scale: + sources: [os/linux/scale.c, os/linux/scale.h ] + +sched: + sources: [ os/linux/os_sched.c, + os/linux/sched.c, + os/linux/sched.h ] + +sim: + sources: [ os/linux/sim.c, os/linux/sim_pci.c ] + +soc: + sources: [ os/linux/soc.c ] + +sysfs: + sources: [ os/linux/sysfs.c, os/linux/sysfs.h, + os/linux/ecc_sysfs.c ] + +thread: + sources: [ os/linux/thread.c ] + +timers: + sources: [ os/linux/timers.c ] + +vgpu: + sources: [ os/linux/vgpu/fecs_trace_vgpu_linux.c, + os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.c, + os/linux/vgpu/platform_vgpu_tegra.c, + os/linux/vgpu/platform_vgpu_tegra.h, + os/linux/vgpu/sysfs_vgpu.c, + os/linux/vgpu/vgpu_ivc.c, + os/linux/vgpu/vgpu_ivm.c, + os/linux/vgpu/vgpu_linux.c, + os/linux/vgpu/vgpu_linux.h ] + +vm: + sources: [ os/linux/vm.c ] + +# Group all the Linux headers for now. +headers: + sources: [ include/nvgpu/linux/atomic.h, + include/nvgpu/linux/barrier.h, + include/nvgpu/linux/cond.h, + include/nvgpu/linux/dma.h, + include/nvgpu/linux/kmem.h, + include/nvgpu/linux/lock.h, + include/nvgpu/linux/nvgpu_mem.h, + include/nvgpu/linux/os_fence_android.h, + include/nvgpu/linux/rwsem.h, + include/nvgpu/linux/sim.h, + include/nvgpu/linux/sim_pci.h, + include/nvgpu/linux/thread.h, + include/nvgpu/linux/vm.h ] + +# An extra unit to lump all the unclassified Linux files. +extra: + sources: [ os/linux/os_linux.h ] diff --git a/arch/nvgpu-posix.yaml b/arch/nvgpu-posix.yaml new file mode 100644 index 000000000..2a812b3a8 --- /dev/null +++ b/arch/nvgpu-posix.yaml @@ -0,0 +1,128 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# POSIX elements and units in nvgpu. +# + +# TODO: break this up into individual units. Will be critical for re-use in +# QNX. +all: + safe: no + owner: Alex W + sources: [ os/posix/error_notifier.c, + os/posix/firmware.c, + os/posix/fuse.c, + os/posix/gk20a.c, + os/posix/log.c, + os/posix/nvgpu.c, + os/posix/os_posix.h, + os/posix/posix-channel.c, + os/posix/posix-comptags.c, + os/posix/posix-dma.c, + os/posix/posix-fault-injection.c, + os/posix/posix-nvgpu_mem.c, + os/posix/posix-tsg.c, + os/posix/posix-vm.c, + os/posix/soc.c, + os/posix/bsearch.c, + os/posix/posix-clk_arb.c, + os/posix/posix-dt.c, + os/posix/posix-io.c, + os/posix/posix-nvhost.c, + os/posix/posix-nvlink.c, + os/posix/posix-sim.c, + os/posix/posix-vgpu.c, + os/posix/posix-vidmem.c, + os/posix/stubs.c ] + +headers: + safe: no + owner: Alex W + sources: [ include/nvgpu/posix/barrier.h, + include/nvgpu/posix/circ_buf.h, + include/nvgpu/posix/dma.h, + include/nvgpu/posix/io.h, + include/nvgpu/posix/log2.h, + include/nvgpu/posix/nvgpu_mem.h, + include/nvgpu/posix/pci.h, + include/nvgpu/posix/posix-fault-injection.h, + include/nvgpu/posix/probe.h, + include/nvgpu/posix/sort.h, + include/nvgpu/posix/vm.h, + include/nvgpu/posix/posix_vidmem.h ] + +bug: + safe: yes + owner: Ajesh K + sources: [ os/posix/bug.c, + include/nvgpu/posix/bug.h ] + deps: + +lock: + safe: yes + owner: Ajesh K + sources: [ os/posix/lock.c, + include/nvgpu/posix/lock.h ] + +rwsem: + safe: yes + owner: Ajesh K + sources: [ os/posix/rwsem.c, + include/nvgpu/posix/rwsem.h ] + deps: + +size: + safe: yes + owner: Ajesh K + sources: [ include/nvgpu/posix/sizes.h ] + deps: + +cond: + safe: yes + owner: Ajesh K + sources: [ os/posix/cond.c, + include/nvgpu/posix/cond.h ] + deps: + +threads: + safe: yes + owner: Ajesh K + sources: [ os/posix/thread.c, + include/nvgpu/posix/thread.h ] + deps: + +timers: + safe: yes + owner: Ajesh K + sources: [ os/posix/timers.c ] + deps: + +atomic: + safe: yes + owner: Ajesh K + sources: [ include/nvgpu/posix/atomic.h ] + deps: + +os_sched: + safe: yes + owner: Ajesh K + sources: [ os/posix/os_sched.c ] + +kmem: + safe: yes + owner: Ajesh K + sources: [ os/posix/kmem.c, + include/nvgpu/posix/kmem.h ] + deps: + +types: + safe: yes + owner: Ajesh K + sources: [ include/nvgpu/posix/types.h ] + deps: + +bitops: + safe: yes + owner: Ajesh K + sources: [ os/posix/bitmap.c, + include/nvgpu/posix/bitops.h ] + deps: diff --git a/arch/nvgpu-vgpu.yaml b/arch/nvgpu-vgpu.yaml new file mode 100644 index 000000000..30c1086dc --- /dev/null +++ b/arch/nvgpu-vgpu.yaml @@ -0,0 +1,63 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# vGPU architecture: currently there hasn't been much work done on +# decomposing the vGPU architecture so all of the vGPU files are simply +# grouped into one super unit. +# +# TODO: Fix this !?!? Seems rather important given that this is the +# target for safety! +# + +all: + safe: no + owner: Aparna D + sources: [ common/vgpu/cbc/cbc_vgpu.c, + common/vgpu/cbc/cbc_vgpu.h, + common/vgpu/ce_vgpu.c, + common/vgpu/clk_vgpu.c, + common/vgpu/clk_vgpu.h, + common/vgpu/debugger_vgpu.c, + common/vgpu/debugger_vgpu.h, + common/vgpu/ecc_vgpu.c, + common/vgpu/ecc_vgpu.h, + common/vgpu/fifo/fifo_vgpu.c, + common/vgpu/fifo/fifo_vgpu.h, + common/vgpu/fifo/ramfc_vgpu.c, + common/vgpu/fifo/ramfc_vgpu.h, + common/vgpu/fifo/runlist_vgpu.c, + common/vgpu/fifo/runlist_vgpu.h, + common/vgpu/fifo/userd_vgpu.c, + common/vgpu/fifo/userd_vgpu.h, + common/vgpu/fifo/vgpu_fifo_gv11b.c, + common/vgpu/fifo/vgpu_fifo_gv11b.h, + common/vgpu/gp10b/vgpu_hal_gp10b.c, + common/vgpu/gr/ctx_vgpu.c, + common/vgpu/gr/ctx_vgpu.h, + common/vgpu/gr/fecs_trace_vgpu.c, + common/vgpu/gr/fecs_trace_vgpu.h, + common/vgpu/gr/gr_vgpu.c, + common/vgpu/gr/gr_vgpu.h, + common/vgpu/gr/subctx_vgpu.c, + common/vgpu/gr/subctx_vgpu.h, + common/vgpu/gv11b/vgpu_gv11b.c, + common/vgpu/gv11b/vgpu_gv11b.h, + common/vgpu/gv11b/vgpu_hal_gv11b.c, + common/vgpu/gv11b/vgpu_tsg_gv11b.c, + common/vgpu/gv11b/vgpu_tsg_gv11b.h, + common/vgpu/ltc/ltc_vgpu.c, + common/vgpu/ltc/ltc_vgpu.h, + common/vgpu/mm/mm_vgpu.c, + common/vgpu/mm/mm_vgpu.h, + common/vgpu/mm/vm_vgpu.c, + common/vgpu/perf/cyclestats_snapshot_vgpu.c, + common/vgpu/perf/cyclestats_snapshot_vgpu.h, + common/vgpu/perf/perf_vgpu.c, + common/vgpu/perf/perf_vgpu.h, + common/vgpu/tsg_vgpu.c, + common/vgpu/vgpu.c, + include/nvgpu/vgpu/tegra_vgpu.h, + include/nvgpu/vgpu/vgpu.h, + include/nvgpu/vgpu/vgpu_ivc.h, + include/nvgpu/vgpu/vgpu_ivm.h, + include/nvgpu/vgpu/ce_vgpu.h, + include/nvgpu/vgpu/vm_vgpu.h ] diff --git a/arch/nvgpu.yaml b/arch/nvgpu.yaml new file mode 100644 index 000000000..0907360a8 --- /dev/null +++ b/arch/nvgpu.yaml @@ -0,0 +1,62 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved. +# +# Top level NVGPU architecure description in YAML. +# +# The format of this document is structured by element and unit. Though only +# units may have source files associated with them. All units must exist in an +# element. +# + +nvgpu: + safe: no + children: + # The common code element. This has gr, mm, etc. + common: + safe: yes + children: + !include nvgpu-common.yaml + + # HAL units - Hardware Abstraction Layer. + hal: + children: + !include nvgpu-hal-new.yaml + + # The QNX OS layer implementation units. TODO: place in QNX directory. + qnx: + safe: yes + children: + !include nvgpu-qnx.yaml + + # And the Linux version of the OS implementation units. + linux: + safe: no + children: + !include nvgpu-linux.yaml + + # POSIX units for implementing the OS layer for unit testing. + posix: + children: + !include nvgpu-posix.yaml + + + # Inteface units - these provide interfaces for NVGPU to the underlying + # OS or CPU. + interface: + safe: yes + owner: Alex W + children: + !include nvgpu-interface.yaml + + # Virtualizatikon code. + vgpu: + safe: yes + children: + !include nvgpu-vgpu.yaml + + # A meta-element for the GPU HW. A good example of this is the HW headers. + # This is not code we write in nvgpu, but we import it from the GPU HW + # tree (with a little tranformation - the gen reg scrip). + gpu_hw: + safe: no + children: + !include nvgpu-gpu_hw.yaml diff --git a/arch/understand_deps_analyze.py b/arch/understand_deps_analyze.py new file mode 100755 index 000000000..b59ddedf6 --- /dev/null +++ b/arch/understand_deps_analyze.py @@ -0,0 +1,58 @@ +#!/usr/bin/python3 +# +# Python script to parse dependency export CSV from Understand. It detects +# these common architectural problems: +# * Common code depends on hardware headers +# * HAL unit depends directly on another HAL unit. The dependency should +# always be via HAL interface. +# * Two units have a circular dependency. +# +# Usage: +# +# understand_deps_analyze.py Dependency graphs->By nvgpu (nvgpu probably comes from the +# name of the architecture .xml file +# * Create arch dependendency report: +# * Reports->Dependency->Architecture Dependencies->Export CSV +# * Choose nvgpu as "Select an architecture to analyze" + +import sys +import re + +def checkMatch(fromUnit, toUnit): + ret = None + + if (not fromUnit.startswith("common/hal") and toUnit.startswith("gpu_hw")): + ret = "Common depends on HW" + + if (fromUnit.startswith("common/hal") and toUnit.startswith("common/hal")): + ret = "HAL depends on HAL" + + # We have still too many of these problems, and it's not clear if we want + # to fix them all. Comment out for now. + # if (fromUnit.startswith("interface") and not toUnit.startswith("interface")): + # ret = "Interface depends on non-interface" + + return ret + +stream = sys.stdin +deps = set() + +depRe = re.compile("(.+),(.+),\d+,\d+,\d+,\d+,\d+") +for line in stream.readlines(): + match = depRe.match(line) + if match: + ret = checkMatch(match.group(1), match.group(2)) + if (ret): + print("%s,%s,%s" % (ret, match.group(1), match.group(2))) + + if "%s,%s" % (match.group(2), match.group(1)) in deps: + print("Circular dependency,%s,%s" % (match.group(1), match.group(2))) + + deps.add("%s,%s" % (match.group(1), match.group(2)))