From 6fe4c09c685a03e7df241106aa9b22fc1be0889e Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Mon, 6 May 2019 09:17:08 -0700 Subject: [PATCH] gpu: nvgpu: engines MISRA fixes for Rule 10.3 Use BIT32 for shift operation on u32 act_eng_id. Jira NVGPU-3385 Change-Id: I92f55bceafb87ba385786360f8df95f128b92351 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2113034 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/engines.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/common/fifo/engines.c b/drivers/gpu/nvgpu/common/fifo/engines.c index ea09052aa..c83ef3c3b 100644 --- a/drivers/gpu/nvgpu/common/fifo/engines.c +++ b/drivers/gpu/nvgpu/common/fifo/engines.c @@ -894,7 +894,7 @@ u32 nvgpu_engine_get_runlist_busy_engines(struct gk20a *g, u32 runlist_id) engine_busy = engine_status.is_busy; if (engine_busy && engine_runlist == runlist_id) { - eng_bitmask |= BIT(act_eng_id); + eng_bitmask |= BIT32(act_eng_id); } }