From 6fe794bc98ff3e90182c9e891ec3a4037cfb9c5f Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Fri, 18 Oct 2019 14:54:36 +0530 Subject: [PATCH] gpu: nvgpu: prepare ce_app.h header In preparation for SWUD of CG unit, separate CE app related APIs into separate header ce_app.h. JIRA NVGPU-4143 Change-Id: I9be8a4f2eee3aaf3af71f5843f957052064d9651 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2221660 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- arch/nvgpu-common.yaml | 2 +- drivers/gpu/nvgpu/common/ce/ce_app.c | 2 +- drivers/gpu/nvgpu/common/mm/mm.c | 2 +- drivers/gpu/nvgpu/common/mm/vidmem.c | 2 +- drivers/gpu/nvgpu/hal/ce/ce2_gk20a.c | 1 - drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_tu104.c | 1 + .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c | 1 + .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c | 1 + drivers/gpu/nvgpu/include/nvgpu/ce.h | 69 -------------- drivers/gpu/nvgpu/include/nvgpu/ce_app.h | 94 +++++++++++++++++++ drivers/gpu/nvgpu/os/linux/debug_ce.c | 2 +- 14 files changed, 105 insertions(+), 75 deletions(-) create mode 100644 drivers/gpu/nvgpu/include/nvgpu/ce_app.h diff --git a/arch/nvgpu-common.yaml b/arch/nvgpu-common.yaml index f9f6568e1..87f1549ea 100644 --- a/arch/nvgpu-common.yaml +++ b/arch/nvgpu-common.yaml @@ -42,7 +42,7 @@ ce_app: owner: Thomas F sources: [ common/ce/ce_app.c, common/ce/ce_priv.h, - include/nvgpu/ce.h ] + include/nvgpu/ce_app.h ] deps: debug: diff --git a/drivers/gpu/nvgpu/common/ce/ce_app.c b/drivers/gpu/nvgpu/common/ce/ce_app.c index cbb83e9de..47badc0e2 100644 --- a/drivers/gpu/nvgpu/common/ce/ce_app.c +++ b/drivers/gpu/nvgpu/common/ce/ce_app.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include "common/ce/ce_priv.h" diff --git a/drivers/gpu/nvgpu/common/mm/mm.c b/drivers/gpu/nvgpu/common/mm/mm.c index 7c16b99c0..9752656b8 100644 --- a/drivers/gpu/nvgpu/common/mm/mm.c +++ b/drivers/gpu/nvgpu/common/mm/mm.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/mm/vidmem.c b/drivers/gpu/nvgpu/common/mm/vidmem.c index e17ab2931..c1538ec4c 100644 --- a/drivers/gpu/nvgpu/common/mm/vidmem.c +++ b/drivers/gpu/nvgpu/common/mm/vidmem.c @@ -21,7 +21,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/hal/ce/ce2_gk20a.c b/drivers/gpu/nvgpu/hal/ce/ce2_gk20a.c index 06f80f56b..9099a1202 100644 --- a/drivers/gpu/nvgpu/hal/ce/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/hal/ce/ce2_gk20a.c @@ -23,7 +23,6 @@ */ #include -#include #include #include #include diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 31ca9d810..1d227d232 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 92192b7c0..e310ed1d1 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 07cc70b0b..f3a086c02 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index cdc72860d..98ba2cb05 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -189,6 +189,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c index f8f027c76..cb743b8d1 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c index 21317e727..6e0317223 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c @@ -98,6 +98,7 @@ #include #include #include +#include #include #ifdef CONFIG_NVGPU_LS_PMU #include diff --git a/drivers/gpu/nvgpu/include/nvgpu/ce.h b/drivers/gpu/nvgpu/include/nvgpu/ce.h index 12126b765..2f464d87f 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/ce.h +++ b/drivers/gpu/nvgpu/include/nvgpu/ce.h @@ -22,77 +22,8 @@ #ifndef NVGPU_CE_H #define NVGPU_CE_H -#include - struct gk20a; -struct nvgpu_fence_type; - -#define NVGPU_CE_INVAL_CTX_ID ~U32(0U) - -/* CE command utility macros */ -#define NVGPU_CE_LOWER_ADDRESS_OFFSET_MASK U32_MAX -#define NVGPU_CE_UPPER_ADDRESS_OFFSET_MASK 0xffU - -#define NVGPU_CE_MAX_INFLIGHT_JOBS 32U -#define NVGPU_CE_MAX_COMMAND_BUFF_BYTES_PER_KICKOFF 256U - -/* dma launch_flags */ - /* location */ -#define NVGPU_CE_SRC_LOCATION_COHERENT_SYSMEM BIT32(0) -#define NVGPU_CE_SRC_LOCATION_NONCOHERENT_SYSMEM BIT32(1) -#define NVGPU_CE_SRC_LOCATION_LOCAL_FB BIT32(2) -#define NVGPU_CE_DST_LOCATION_COHERENT_SYSMEM BIT32(3) -#define NVGPU_CE_DST_LOCATION_NONCOHERENT_SYSMEM BIT32(4) -#define NVGPU_CE_DST_LOCATION_LOCAL_FB BIT32(5) - /* memory layout */ -#define NVGPU_CE_SRC_MEMORY_LAYOUT_PITCH BIT32(6) -#define NVGPU_CE_SRC_MEMORY_LAYOUT_BLOCKLINEAR BIT32(7) -#define NVGPU_CE_DST_MEMORY_LAYOUT_PITCH BIT32(8) -#define NVGPU_CE_DST_MEMORY_LAYOUT_BLOCKLINEAR BIT32(9) - /* transfer type */ -#define NVGPU_CE_DATA_TRANSFER_TYPE_PIPELINED BIT32(10) -#define NVGPU_CE_DATA_TRANSFER_TYPE_NON_PIPELINED BIT32(11) - -/* CE operation mode */ -#define NVGPU_CE_PHYS_MODE_TRANSFER BIT32(0) -#define NVGPU_CE_MEMSET BIT32(1) - -/* CE app state machine flags */ -enum { - NVGPU_CE_ACTIVE = (1 << 0), - NVGPU_CE_SUSPEND = (1 << 1), -}; - -/* gpu context state machine flags */ -enum { - NVGPU_CE_GPU_CTX_ALLOCATED = (1 << 0), - NVGPU_CE_GPU_CTX_DELETED = (1 << 1), -}; int nvgpu_ce_init_support(struct gk20a *g); -#ifdef CONFIG_NVGPU_DGPU -/* global CE app related apis */ -int nvgpu_ce_app_init_support(struct gk20a *g); -void nvgpu_ce_app_suspend(struct gk20a *g); -void nvgpu_ce_app_destroy(struct gk20a *g); - -/* CE app utility functions */ -u32 nvgpu_ce_app_create_context(struct gk20a *g, - u32 runlist_id, - int timeslice, - int runlist_level); -void nvgpu_ce_app_delete_context(struct gk20a *g, - u32 ce_ctx_id); -int nvgpu_ce_execute_ops(struct gk20a *g, - u32 ce_ctx_id, - u64 src_buf, - u64 dst_buf, - u64 size, - unsigned int payload, - u32 launch_flags, - u32 request_operation, - u32 submit_flags, - struct nvgpu_fence_type **fence_out); -#endif #endif /*NVGPU_CE_H*/ diff --git a/drivers/gpu/nvgpu/include/nvgpu/ce_app.h b/drivers/gpu/nvgpu/include/nvgpu/ce_app.h new file mode 100644 index 000000000..4a19f29ce --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/ce_app.h @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef NVGPU_CE_APP_H +#define NVGPU_CE_APP_H + +#include + +struct gk20a; +struct nvgpu_fence_type; + +#define NVGPU_CE_INVAL_CTX_ID ~U32(0U) + +/* CE command utility macros */ +#define NVGPU_CE_LOWER_ADDRESS_OFFSET_MASK U32_MAX +#define NVGPU_CE_UPPER_ADDRESS_OFFSET_MASK 0xffU + +#define NVGPU_CE_MAX_INFLIGHT_JOBS 32U +#define NVGPU_CE_MAX_COMMAND_BUFF_BYTES_PER_KICKOFF 256U + +/* dma launch_flags */ + /* location */ +#define NVGPU_CE_SRC_LOCATION_COHERENT_SYSMEM BIT32(0) +#define NVGPU_CE_SRC_LOCATION_NONCOHERENT_SYSMEM BIT32(1) +#define NVGPU_CE_SRC_LOCATION_LOCAL_FB BIT32(2) +#define NVGPU_CE_DST_LOCATION_COHERENT_SYSMEM BIT32(3) +#define NVGPU_CE_DST_LOCATION_NONCOHERENT_SYSMEM BIT32(4) +#define NVGPU_CE_DST_LOCATION_LOCAL_FB BIT32(5) + /* memory layout */ +#define NVGPU_CE_SRC_MEMORY_LAYOUT_PITCH BIT32(6) +#define NVGPU_CE_SRC_MEMORY_LAYOUT_BLOCKLINEAR BIT32(7) +#define NVGPU_CE_DST_MEMORY_LAYOUT_PITCH BIT32(8) +#define NVGPU_CE_DST_MEMORY_LAYOUT_BLOCKLINEAR BIT32(9) + /* transfer type */ +#define NVGPU_CE_DATA_TRANSFER_TYPE_PIPELINED BIT32(10) +#define NVGPU_CE_DATA_TRANSFER_TYPE_NON_PIPELINED BIT32(11) + +/* CE operation mode */ +#define NVGPU_CE_PHYS_MODE_TRANSFER BIT32(0) +#define NVGPU_CE_MEMSET BIT32(1) + +/* CE app state machine flags */ +enum { + NVGPU_CE_ACTIVE = (1 << 0), + NVGPU_CE_SUSPEND = (1 << 1), +}; + +/* gpu context state machine flags */ +enum { + NVGPU_CE_GPU_CTX_ALLOCATED = (1 << 0), + NVGPU_CE_GPU_CTX_DELETED = (1 << 1), +}; + +/* global CE app related apis */ +int nvgpu_ce_app_init_support(struct gk20a *g); +void nvgpu_ce_app_suspend(struct gk20a *g); +void nvgpu_ce_app_destroy(struct gk20a *g); + +/* CE app utility functions */ +u32 nvgpu_ce_app_create_context(struct gk20a *g, + u32 runlist_id, + int timeslice, + int runlist_level); +void nvgpu_ce_app_delete_context(struct gk20a *g, + u32 ce_ctx_id); +int nvgpu_ce_execute_ops(struct gk20a *g, + u32 ce_ctx_id, + u64 src_buf, + u64 dst_buf, + u64 size, + unsigned int payload, + u32 launch_flags, + u32 request_operation, + u32 submit_flags, + struct nvgpu_fence_type **fence_out); +#endif /*NVGPU_CE_APP_H*/ diff --git a/drivers/gpu/nvgpu/os/linux/debug_ce.c b/drivers/gpu/nvgpu/os/linux/debug_ce.c index 27c82a4b6..3d00074a8 100644 --- a/drivers/gpu/nvgpu/os/linux/debug_ce.c +++ b/drivers/gpu/nvgpu/os/linux/debug_ce.c @@ -15,7 +15,7 @@ #include "debug_ce.h" #include "os_linux.h" -#include +#include #include