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gpu: nvgpu: Remove hard coded constants from ACR

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During code inspection use of some hard coded
constants was found in some parts of the code.
Some constants are replaced by macros and some
are declared using const keyword.

JIRA NVGPU-6260

Change-Id: I95112dfcac7c8b996789a68e7ddf78b16713a823
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2485727
(cherry picked from commit b7e554267d9ef94ae5ac4529f4758127b97d3ba5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492451
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Andrey Jivsov <ajivsov@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2021-02-12 17:49:06 +05:30
committed by mobile promotions
parent 38e6c9ae98
commit 6ffadc0e32
5 changed files with 30 additions and 21 deletions
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7
drivers/gpu/nvgpu/common/acr/acr_blob_construct.c
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@@ -683,6 +683,7 @@ static int lsf_gen_wpr_requirements(struct gk20a *g,
u32 sub_wpr_header;
#endif
u32 wpr_offset;
u32 flcn_cnt;
/*
* Start with an array of WPR headers at the base of the WPR.
@@ -690,8 +691,9 @@ static int lsf_gen_wpr_requirements(struct gk20a *g,
* read of this array and cache it internally so it's OK to pack these.
* Also, we add 1 to the falcon count to indicate the end of the array.
*/
flcn_cnt = U32(plsfm->managed_flcn_cnt);
wpr_offset = nvgpu_safe_mult_u32(U32(sizeof(struct lsf_wpr_header)),
nvgpu_safe_add_u32(U32(plsfm->managed_flcn_cnt), U32(1)));
nvgpu_safe_add_u32(flcn_cnt, U32(1)));
#ifdef CONFIG_NVGPU_DGPU
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR)) {
@@ -919,14 +921,13 @@ static int lsfm_init_wpr_contents(struct gk20a *g,
{
struct lsfm_managed_ucode_img *pnode = plsfm->ucode_img_list;
struct lsf_wpr_header last_wpr_hdr;
u32 i;
u32 i = 0;
u64 tmp;
int err = 0;
/* The WPR array is at the base of the WPR */
pnode = plsfm->ucode_img_list;
(void) memset(&last_wpr_hdr, MEMSET_VALUE, sizeof(struct lsf_wpr_header));
i = 0;
#ifdef CONFIG_NVGPU_DGPU
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR)) {