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gpu: nvgpu: MSCG support

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- Added enable_mscg, mscg_enabled & mscg_stat flags,
  mscg_enabled flag can be used to controll
  mscg enable/disable at runtime along with mscg_stat flag.
- Added defines & interface to support ms/mclk-change/post-init-param
- Added defines for lpwr tables read  from vbios.
- HAL to support post init param which is require
  to setup clockgating interface in PMU & interfaces used during
  mscg state machine.
- gk20a_pmu_pg_global_enable() can be called when pg support
  required to enable/disable, this also checks & wait
  if pstate switch is in progress till it complets
- pg_mutex to protect PG-RPPG/MSCG enable/disable

JIRA DNVGPU-71

Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247554
(cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a)
Reviewed-on: http://git-master/r/1270971
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2016-11-03 21:10:24 +05:30
committed by mobile promotions
parent 66ed536fb5
commit 71fbfdb2b8
10 changed files with 166 additions and 35 deletions
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7
drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
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@@ -629,6 +629,9 @@ struct pmu_pg_stats {
#define PMU_ELPG_STAT_OFF_ON_PENDING 4 /* elpg is off, caller has requested on, but ALLOW
cmd hasn't been sent due to ENABLE_ALLOW delay */
#define PMU_MSCG_DISABLED 0
#define PMU_MSCG_ENABLED 1
/* Falcon Register index */
#define PMU_FALCON_REG_R0 (0)
#define PMU_FALCON_REG_R1 (1)
@@ -716,10 +719,13 @@ struct pmu_gk20a {
u32 elpg_stat;
u32 mscg_stat;
int pmu_state;
#define PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC 1 /* msec */
struct work_struct pg_init;
struct mutex pg_mutex; /* protect pg-RPPG/MSCG enable/disable */
struct mutex elpg_mutex; /* protect elpg enable/disable */
int elpg_refcnt; /* disable -1, enable +1, <=0 elpg disabled, > 0 elpg enabled */
@@ -774,6 +780,7 @@ int gk20a_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd, struct pmu_msg *msg
int gk20a_pmu_enable_elpg(struct gk20a *g);
int gk20a_pmu_disable_elpg(struct gk20a *g);
int gk20a_pmu_pg_global_enable(struct gk20a *g, u32 enable_pg);
u32 gk20a_pmu_pg_engines_list(struct gk20a *g);
u32 gk20a_pmu_pg_feature_list(struct gk20a *g, u32 pg_engine_id);