gpu: nvgpu: Split stalling interrupt handling

Split handling of stalling interrupt to Linux specific chip
agnostic and OS independent chip specific parts.

Linux specific chip independent part contains handler for ISR
and passing the control to a bottom half. It uses the new MC HALs
intr_stall (query interrupt status), intr_pause (pause interrupts)
and intr_resume (resume interrupts).

MC HAL isr_stall now returns void and gets called in thread context
and thus remove isr_thread_stall and replace the implementation with
isr_stall.

JIRA NVGPU-26

Change-Id: I206f330f6fc4a1f4def47c5f986585ac4080216d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1480243
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2017-05-11 13:12:03 -07:00
committed by mobile promotions
parent 0bb47c3675
commit 726900b843
11 changed files with 147 additions and 89 deletions

View File

@@ -25,6 +25,7 @@
#include "gk20a/platform_gk20a.h"
#include "clk/clk.h"
#include "module.h"
#include "intr.h"
#include "pci.h"
@@ -232,7 +233,7 @@ static irqreturn_t nvgpu_pci_isr(int irq, void *dev_id)
irqreturn_t ret_stall;
irqreturn_t ret_nonstall;
ret_stall = g->ops.mc.isr_stall(g);
ret_stall = nvgpu_intr_stall(g);
ret_nonstall = g->ops.mc.isr_nonstall(g);
#if defined(CONFIG_PCI_MSI)
@@ -248,9 +249,7 @@ static irqreturn_t nvgpu_pci_intr_thread(int irq, void *dev_id)
{
struct gk20a *g = dev_id;
g->ops.mc.isr_thread_stall(g);
return IRQ_HANDLED;
return nvgpu_intr_thread_stall(g);
}
static int nvgpu_pci_init_support(struct pci_dev *pdev)