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gpu: nvgpu: update enable_fifo_interrupts

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To reuse enable_fifo_interrupts API in future chips, this patch renames
it as ga10b_fifo_enable_intr and adds it to FIFO specific header file.

JIRA NVGPU-9325

Change-Id: I9f313e417281d5861f568bd41593c5135d9c77a9
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2848816
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2023-01-25 15:29:21 +00:00
committed by mobile promotions
parent de190c8979
commit 73679f1ec8
2 changed files with 5 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/hal/fifo/fifo_ga10b.h
View File

@@ -1,7 +1,7 @@
/* /*
* GA10B Fifo * GA10B Fifo
* *
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -32,5 +32,6 @@ struct gk20a;
int ga10b_init_fifo_reset_enable_hw(struct gk20a *g); int ga10b_init_fifo_reset_enable_hw(struct gk20a *g);
int ga10b_init_fifo_setup_hw(struct gk20a *g); int ga10b_init_fifo_setup_hw(struct gk20a *g);
u32 ga10b_fifo_mmu_fault_id_to_pbdma_id(struct gk20a *g, u32 mmu_fault_id); u32 ga10b_fifo_mmu_fault_id_to_pbdma_id(struct gk20a *g, u32 mmu_fault_id);
void ga10b_fifo_enable_intr(struct gk20a *g);
#endif /* NVGPU_FIFO_GA10B_H */ #endif /* NVGPU_FIFO_GA10B_H */

6
drivers/gpu/nvgpu/hal/fifo/fifo_ga10b_fusa.c
View File

@@ -1,7 +1,7 @@
/* /*
* GA10B Fifo * GA10B Fifo
* *
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -36,7 +36,7 @@
#include "fifo_ga10b.h" #include "fifo_ga10b.h"
#include "fifo_intr_ga10b.h" #include "fifo_intr_ga10b.h"
static void enable_fifo_interrupts(struct gk20a *g) void ga10b_fifo_enable_intr(struct gk20a *g)
{ {
g->ops.fifo.intr_top_enable(g, NVGPU_CIC_INTR_ENABLE); g->ops.fifo.intr_top_enable(g, NVGPU_CIC_INTR_ENABLE);
g->ops.fifo.intr_0_enable(g, true); g->ops.fifo.intr_0_enable(g, true);
@@ -133,7 +133,7 @@ int ga10b_init_fifo_setup_hw(struct gk20a *g)
g->ops.usermode.setup_hw(g); g->ops.usermode.setup_hw(g);
enable_fifo_interrupts(g); ga10b_fifo_enable_intr(g);
ga10b_fifo_config_userd_writeback_timer(g); ga10b_fifo_config_userd_writeback_timer(g);