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gpu: nvgpu: vgpu: add vgpu_gv11b_tsg_bind_channel

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Add TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX command to pass subctx_id
and runqueu_sel to RM server. Use this command in gv11b's
implementation of gops->fifo.tsg_bind_channel.

Jira EVLR-1751

Change-Id: I8ba69c95ea1c6bb7fa106588b6420ed543b2386b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2017-10-16 08:58:59 -07:00
committed by mobile promotions
parent 075852f042
commit 738bee0373
5 changed files with 101 additions and 2 deletions
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9
include/linux/tegra_vgpu_t19x.h
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@@ -17,6 +17,7 @@
#define TEGRA_VGPU_CMD_ALLOC_CTX_HEADER 100
#define TEGRA_VGPU_CMD_FREE_CTX_HEADER 101
#define TEGRA_VGPU_CMD_MAP_SYNCPT 102
#define TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX 103
struct tegra_vgpu_alloc_ctx_header_params {
u64 ch_handle;
@@ -35,10 +36,18 @@ struct tegra_vgpu_map_syncpt_params {
u8 prot;
};
struct tegra_vgpu_tsg_bind_channel_ex_params {
u32 tsg_id;
u64 ch_handle;
u32 subctx_id;
u32 runqueue_sel;
};
union tegra_vgpu_t19x_params {
struct tegra_vgpu_alloc_ctx_header_params alloc_ctx_header;
struct tegra_vgpu_free_ctx_header_params free_ctx_header;
struct tegra_vgpu_map_syncpt_params map_syncpt;
struct tegra_vgpu_tsg_bind_channel_ex_params tsg_bind_channel_ex;
};
#define TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT 100