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gpu: nvgpu: unit: falcon wait for halt test
Add unit test for function nvgpu_falcon_wait_for_halt. JIRA NVGPU-898 Change-Id: Ifc5519e9d813ba03e7bf531f18a65012fa24d9e6 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2160241 GVS: Gerrit_Virtual_Submit Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -495,6 +495,69 @@ static int test_falcon_idle(struct unit_module *m, struct gk20a *g,
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return UNIT_SUCCESS;
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}
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static void flcn_halt_pass(void *data)
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{
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struct nvgpu_falcon *flcn = (struct nvgpu_falcon *) data;
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u32 cpuctl_addr = flcn->flcn_base + falcon_falcon_cpuctl_r();
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struct gk20a *g = flcn->g;
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u32 unit_status;
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unit_status = nvgpu_posix_io_readl_reg_space(g, cpuctl_addr);
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unit_status |= falcon_falcon_cpuctl_halt_intr_m();
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nvgpu_posix_io_writel_reg_space(g, cpuctl_addr, unit_status);
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}
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static void flcn_halt_fail(void *data)
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{
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struct nvgpu_falcon *flcn = (struct nvgpu_falcon *) data;
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u32 cpuctl_addr = flcn->flcn_base + falcon_falcon_cpuctl_r();
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struct gk20a *g = flcn->g;
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u32 unit_status;
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unit_status = nvgpu_posix_io_readl_reg_space(g, cpuctl_addr);
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unit_status &= ~falcon_falcon_cpuctl_halt_intr_m();
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nvgpu_posix_io_writel_reg_space(g, cpuctl_addr, unit_status);
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}
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/*
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* Invalid: Calling this interface on uninitialized falcon should return
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* -EINVAL.
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*
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* Valid: Set the Falcon halt state as halted in falcon_falcon_cpuctl_r and
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* call should return 0. Set it to non-halted and call should return
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* -ETIMEDOUT.
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*/
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static int test_falcon_halt(struct unit_module *m, struct gk20a *g,
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void *__args)
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{
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#define FALCON_WAIT_HALT 200
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struct {
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struct nvgpu_falcon *flcn;
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void (*pre_halt)(void *);
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int exp_err;
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} test_data[] = {{uninit_flcn, NULL, -EINVAL},
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{gpccs_flcn, flcn_halt_pass, 0},
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{gpccs_flcn, flcn_halt_fail, -ETIMEDOUT} };
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int size = ARRAY_SIZE(test_data);
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int err, i;
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for (i = 0; i < size; i++) {
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if (test_data[i].pre_halt) {
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test_data[i].pre_halt(test_data[i].flcn);
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}
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err = nvgpu_falcon_wait_for_halt(test_data[i].flcn,
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FALCON_WAIT_HALT);
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if (err != test_data[i].exp_err) {
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unit_return_fail(m, "falcon wait for idle err: %d "
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"expected err: %d\n",
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err, test_data[i].exp_err);
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}
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}
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return UNIT_SUCCESS;
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}
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/*
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* Valid/Invalid: Status of read and write from Falcon
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* Valid: Read and write from initialized Falcon succeeds.
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@@ -679,6 +742,7 @@ struct unit_module_test falcon_tests[] = {
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UNIT_TEST(falcon_reset, test_falcon_reset, NULL, 0),
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UNIT_TEST(falcon_mem_scrub, test_falcon_mem_scrub, NULL, 0),
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UNIT_TEST(falcon_idle, test_falcon_idle, NULL, 0),
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UNIT_TEST(falcon_halt, test_falcon_halt, NULL, 0),
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UNIT_TEST(falcon_mem_rw_init, test_falcon_mem_rw_init, NULL, 0),
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UNIT_TEST(falcon_mem_rw_range, test_falcon_mem_rw_range, NULL, 0),
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UNIT_TEST(falcon_mem_rw_aligned, test_falcon_mem_rw_aligned, NULL, 0),
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