mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
gpu: nvgpu: add CONFIG_NVGPU_DMABUF_HAS_DRVDATA
dma_buf private data is not supported in upstream kernel. Update the logic of pin/unpin when this support is not present. Separate out the related functions to new file and select logic based on new config flag CONFIG_NVGPU_DMABUF_HAS_DRVDATA. Bug 2834141 Change-Id: I921758727b1bfc3690f2ab26bccd9befae14d782 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294098 Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Alex Waterman
parent
98e84b8046
commit
74ae8bb20b
@@ -38,7 +38,8 @@ dma:
|
|||||||
|
|
||||||
dmabuf:
|
dmabuf:
|
||||||
sources: [ os/linux/dmabuf.c, os/linux/dmabuf_vidmem.c,
|
sources: [ os/linux/dmabuf.c, os/linux/dmabuf_vidmem.c,
|
||||||
os/linux/dmabuf.h, os/linux/dmabuf_vidmem.h ]
|
os/linux/dmabuf.h, os/linux/dmabuf_vidmem.h,
|
||||||
|
os/linux/dmabuf_priv.c, os/linux/dmabuf_priv.h ]
|
||||||
|
|
||||||
driver_common:
|
driver_common:
|
||||||
sources: [ os/linux/driver_common.c, os/linux/driver_common.h ]
|
sources: [ os/linux/driver_common.c, os/linux/driver_common.h ]
|
||||||
|
|||||||
@@ -201,3 +201,10 @@ config NVGPU_GR_VIRTUALIZATION
|
|||||||
default y
|
default y
|
||||||
help
|
help
|
||||||
Support NVGPU Virtualization
|
Support NVGPU Virtualization
|
||||||
|
|
||||||
|
config NVGPU_DMABUF_HAS_DRVDATA
|
||||||
|
bool "NVGPU DMABUF private driver data support"
|
||||||
|
depends on GK20A
|
||||||
|
default y
|
||||||
|
help
|
||||||
|
Support NVGPU DMABUF private driver data needed for compression
|
||||||
|
|||||||
@@ -353,6 +353,8 @@ nvgpu-y += \
|
|||||||
os/linux/dmabuf_vidmem.o \
|
os/linux/dmabuf_vidmem.o \
|
||||||
os/linux/vpr.o
|
os/linux/vpr.o
|
||||||
|
|
||||||
|
nvgpu-$(CONFIG_NVGPU_DMABUF_HAS_DRVDATA) += os/linux/dmabuf_priv.o
|
||||||
|
|
||||||
nvgpu-$(CONFIG_DEBUG_FS) += \
|
nvgpu-$(CONFIG_DEBUG_FS) += \
|
||||||
os/linux/debug.o \
|
os/linux/debug.o \
|
||||||
os/linux/debug_gr.o \
|
os/linux/debug_gr.o \
|
||||||
|
|||||||
@@ -45,6 +45,7 @@
|
|||||||
#include "cde.h"
|
#include "cde.h"
|
||||||
#include "os_linux.h"
|
#include "os_linux.h"
|
||||||
#include "dmabuf.h"
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
#include "channel.h"
|
#include "channel.h"
|
||||||
#include "cde_gm20b.h"
|
#include "cde_gm20b.h"
|
||||||
#include "cde_gp10b.h"
|
#include "cde_gp10b.h"
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms and conditions of the GNU General Public License,
|
* under the terms and conditions of the GNU General Public License,
|
||||||
@@ -22,6 +22,7 @@
|
|||||||
#include <nvgpu/linux/vm.h>
|
#include <nvgpu/linux/vm.h>
|
||||||
|
|
||||||
#include "dmabuf.h"
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
|
|
||||||
void gk20a_get_comptags(struct nvgpu_os_buffer *buf,
|
void gk20a_get_comptags(struct nvgpu_os_buffer *buf,
|
||||||
struct gk20a_comptags *comptags)
|
struct gk20a_comptags *comptags)
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms and conditions of the GNU General Public License,
|
* under the terms and conditions of the GNU General Public License,
|
||||||
@@ -27,38 +27,10 @@
|
|||||||
|
|
||||||
#include "platform_gk20a.h"
|
#include "platform_gk20a.h"
|
||||||
#include "dmabuf.h"
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
#include "os_linux.h"
|
#include "os_linux.h"
|
||||||
#include "dmabuf_vidmem.h"
|
#include "dmabuf_vidmem.h"
|
||||||
|
|
||||||
static void gk20a_mm_delete_priv(void *_priv)
|
|
||||||
{
|
|
||||||
struct gk20a_buffer_state *s, *s_tmp;
|
|
||||||
struct gk20a_dmabuf_priv *priv = _priv;
|
|
||||||
struct gk20a *g;
|
|
||||||
|
|
||||||
if (!priv)
|
|
||||||
return;
|
|
||||||
|
|
||||||
g = priv->g;
|
|
||||||
|
|
||||||
if (priv->comptags.allocated && priv->comptags.lines) {
|
|
||||||
BUG_ON(!priv->comptag_allocator);
|
|
||||||
gk20a_comptaglines_free(priv->comptag_allocator,
|
|
||||||
priv->comptags.offset,
|
|
||||||
priv->comptags.lines);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Free buffer states */
|
|
||||||
nvgpu_list_for_each_entry_safe(s, s_tmp, &priv->states,
|
|
||||||
gk20a_buffer_state, list) {
|
|
||||||
nvgpu_fence_put(s->fence);
|
|
||||||
nvgpu_list_del(&s->list);
|
|
||||||
nvgpu_kfree(g, s);
|
|
||||||
}
|
|
||||||
|
|
||||||
nvgpu_kfree(g, priv);
|
|
||||||
}
|
|
||||||
|
|
||||||
enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
|
enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
|
||||||
struct dma_buf *dmabuf)
|
struct dma_buf *dmabuf)
|
||||||
{
|
{
|
||||||
@@ -89,139 +61,36 @@ enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
|
|||||||
struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf,
|
struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf,
|
||||||
struct dma_buf_attachment **attachment)
|
struct dma_buf_attachment **attachment)
|
||||||
{
|
{
|
||||||
struct gk20a_dmabuf_priv *priv;
|
#ifdef CONFIG_NVGPU_DMABUF_HAS_DRVDATA
|
||||||
|
return gk20a_mm_pin_has_drvdata(dev, dmabuf, attachment);
|
||||||
|
#else
|
||||||
|
struct dma_buf_attachment *attach = NULL;
|
||||||
|
struct sg_table *sgt = NULL;
|
||||||
|
|
||||||
priv = dma_buf_get_drvdata(dmabuf, dev);
|
attach = dma_buf_attach(dmabuf, dev);
|
||||||
if (!priv) {
|
if (IS_ERR(attach)) {
|
||||||
nvgpu_do_assert();
|
return NULL;
|
||||||
return ERR_PTR(-EINVAL);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
nvgpu_mutex_acquire(&priv->lock);
|
sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
|
||||||
|
if (IS_ERR(sgt)) {
|
||||||
if (priv->pin_count == 0) {
|
dma_buf_detach(dmabuf, attach);
|
||||||
priv->attach = dma_buf_attach(dmabuf, dev);
|
return NULL;
|
||||||
if (IS_ERR(priv->attach)) {
|
|
||||||
nvgpu_mutex_release(&priv->lock);
|
|
||||||
return (struct sg_table *)priv->attach;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
priv->sgt = dma_buf_map_attachment(priv->attach,
|
*attachment = attach;
|
||||||
DMA_BIDIRECTIONAL);
|
return sgt;
|
||||||
if (IS_ERR(priv->sgt)) {
|
#endif
|
||||||
dma_buf_detach(dmabuf, priv->attach);
|
|
||||||
nvgpu_mutex_release(&priv->lock);
|
|
||||||
return priv->sgt;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
priv->pin_count++;
|
|
||||||
nvgpu_mutex_release(&priv->lock);
|
|
||||||
*attachment = priv->attach;
|
|
||||||
return priv->sgt;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
|
void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
|
||||||
struct dma_buf_attachment *attachment,
|
struct dma_buf_attachment *attachment,
|
||||||
struct sg_table *sgt)
|
struct sg_table *sgt)
|
||||||
{
|
{
|
||||||
struct gk20a_dmabuf_priv *priv = dma_buf_get_drvdata(dmabuf, dev);
|
#ifdef CONFIG_NVGPU_DMABUF_HAS_DRVDATA
|
||||||
dma_addr_t dma_addr;
|
gk20a_mm_unpin_has_drvdata(dev, dmabuf, attachment, sgt);
|
||||||
|
#else
|
||||||
if (IS_ERR(priv) || !priv)
|
dma_buf_unmap_attachment(attachment, sgt, DMA_BIDIRECTIONAL);
|
||||||
return;
|
dma_buf_detach(dmabuf, attachment);
|
||||||
|
#endif
|
||||||
nvgpu_mutex_acquire(&priv->lock);
|
|
||||||
nvgpu_assert(priv->sgt == sgt);
|
|
||||||
nvgpu_assert(priv->attach == attachment);
|
|
||||||
priv->pin_count--;
|
|
||||||
nvgpu_assert(priv->pin_count >= 0);
|
|
||||||
dma_addr = sg_dma_address(priv->sgt->sgl);
|
|
||||||
if (priv->pin_count == 0) {
|
|
||||||
dma_buf_unmap_attachment(priv->attach, priv->sgt,
|
|
||||||
DMA_BIDIRECTIONAL);
|
|
||||||
dma_buf_detach(dmabuf, priv->attach);
|
|
||||||
}
|
|
||||||
nvgpu_mutex_release(&priv->lock);
|
|
||||||
}
|
|
||||||
|
|
||||||
int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev)
|
|
||||||
{
|
|
||||||
struct gk20a *g = gk20a_get_platform(dev)->g;
|
|
||||||
struct gk20a_dmabuf_priv *priv;
|
|
||||||
|
|
||||||
priv = dma_buf_get_drvdata(dmabuf, dev);
|
|
||||||
if (likely(priv))
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
nvgpu_mutex_acquire(&g->mm.priv_lock);
|
|
||||||
priv = dma_buf_get_drvdata(dmabuf, dev);
|
|
||||||
if (priv)
|
|
||||||
goto priv_exist_or_err;
|
|
||||||
|
|
||||||
priv = nvgpu_kzalloc(g, sizeof(*priv));
|
|
||||||
if (!priv) {
|
|
||||||
priv = ERR_PTR(-ENOMEM);
|
|
||||||
goto priv_exist_or_err;
|
|
||||||
}
|
|
||||||
|
|
||||||
nvgpu_mutex_init(&priv->lock);
|
|
||||||
nvgpu_init_list_node(&priv->states);
|
|
||||||
priv->g = g;
|
|
||||||
dma_buf_set_drvdata(dmabuf, dev, priv, gk20a_mm_delete_priv);
|
|
||||||
|
|
||||||
priv_exist_or_err:
|
|
||||||
nvgpu_mutex_release(&g->mm.priv_lock);
|
|
||||||
if (IS_ERR(priv))
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
|
|
||||||
u64 offset, struct gk20a_buffer_state **state)
|
|
||||||
{
|
|
||||||
int err = 0;
|
|
||||||
struct gk20a_dmabuf_priv *priv;
|
|
||||||
struct gk20a_buffer_state *s;
|
|
||||||
struct device *dev = dev_from_gk20a(g);
|
|
||||||
|
|
||||||
if (offset >= (u64)dmabuf->size) {
|
|
||||||
nvgpu_do_assert();
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
|
|
||||||
if (err)
|
|
||||||
return err;
|
|
||||||
|
|
||||||
priv = dma_buf_get_drvdata(dmabuf, dev);
|
|
||||||
if (!priv) {
|
|
||||||
nvgpu_do_assert();
|
|
||||||
return -ENOSYS;
|
|
||||||
}
|
|
||||||
|
|
||||||
nvgpu_mutex_acquire(&priv->lock);
|
|
||||||
|
|
||||||
nvgpu_list_for_each_entry(s, &priv->states, gk20a_buffer_state, list)
|
|
||||||
if (s->offset == offset)
|
|
||||||
goto out;
|
|
||||||
|
|
||||||
/* State not found, create state. */
|
|
||||||
s = nvgpu_kzalloc(g, sizeof(*s));
|
|
||||||
if (!s) {
|
|
||||||
err = -ENOMEM;
|
|
||||||
goto out;
|
|
||||||
}
|
|
||||||
|
|
||||||
s->offset = offset;
|
|
||||||
nvgpu_init_list_node(&s->list);
|
|
||||||
nvgpu_mutex_init(&s->lock);
|
|
||||||
nvgpu_list_add_tail(&s->list, &priv->states);
|
|
||||||
|
|
||||||
out:
|
|
||||||
nvgpu_mutex_release(&priv->lock);
|
|
||||||
if (!err)
|
|
||||||
*state = s;
|
|
||||||
return err;
|
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms and conditions of the GNU General Public License,
|
* under the terms and conditions of the GNU General Public License,
|
||||||
@@ -14,77 +14,18 @@
|
|||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __COMMON_LINUX_DMABUF_H__
|
#ifndef NVGPU_DMABUF_H
|
||||||
#define __COMMON_LINUX_DMABUF_H__
|
#define NVGPU_DMABUF_H
|
||||||
|
|
||||||
#include <nvgpu/comptags.h>
|
|
||||||
#include <nvgpu/list.h>
|
|
||||||
#include <nvgpu/lock.h>
|
|
||||||
#include <nvgpu/gmmu.h>
|
|
||||||
|
|
||||||
struct sg_table;
|
struct sg_table;
|
||||||
struct dma_buf;
|
struct dma_buf;
|
||||||
struct dma_buf_attachment;
|
struct dma_buf_attachment;
|
||||||
struct device;
|
struct device;
|
||||||
|
|
||||||
struct gk20a;
|
|
||||||
|
|
||||||
struct gk20a_buffer_state {
|
|
||||||
struct nvgpu_list_node list;
|
|
||||||
|
|
||||||
/* The valid compbits and the fence must be changed atomically. */
|
|
||||||
struct nvgpu_mutex lock;
|
|
||||||
|
|
||||||
/* Offset of the surface within the dma-buf whose state is
|
|
||||||
* described by this struct (one dma-buf can contain multiple
|
|
||||||
* surfaces with different states). */
|
|
||||||
size_t offset;
|
|
||||||
|
|
||||||
/* A bitmask of valid sets of compbits (0 = uncompressed). */
|
|
||||||
u32 valid_compbits;
|
|
||||||
|
|
||||||
/* The ZBC color used on this buffer. */
|
|
||||||
u32 zbc_color;
|
|
||||||
|
|
||||||
/* This struct reflects the state of the buffer when this
|
|
||||||
* fence signals. */
|
|
||||||
struct nvgpu_fence_type *fence;
|
|
||||||
};
|
|
||||||
|
|
||||||
static inline struct gk20a_buffer_state *
|
|
||||||
gk20a_buffer_state_from_list(struct nvgpu_list_node *node)
|
|
||||||
{
|
|
||||||
return (struct gk20a_buffer_state *)
|
|
||||||
((uintptr_t)node - offsetof(struct gk20a_buffer_state, list));
|
|
||||||
};
|
|
||||||
|
|
||||||
struct gk20a_dmabuf_priv {
|
|
||||||
struct nvgpu_mutex lock;
|
|
||||||
|
|
||||||
struct gk20a *g;
|
|
||||||
|
|
||||||
struct gk20a_comptag_allocator *comptag_allocator;
|
|
||||||
struct gk20a_comptags comptags;
|
|
||||||
|
|
||||||
struct dma_buf_attachment *attach;
|
|
||||||
struct sg_table *sgt;
|
|
||||||
|
|
||||||
int pin_count;
|
|
||||||
|
|
||||||
struct nvgpu_list_node states;
|
|
||||||
|
|
||||||
u64 buffer_id;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf,
|
struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf,
|
||||||
struct dma_buf_attachment **attachment);
|
struct dma_buf_attachment **attachment);
|
||||||
void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
|
void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
|
||||||
struct dma_buf_attachment *attachment,
|
struct dma_buf_attachment *attachment,
|
||||||
struct sg_table *sgt);
|
struct sg_table *sgt);
|
||||||
|
|
||||||
int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev);
|
|
||||||
|
|
||||||
int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
|
|
||||||
u64 offset, struct gk20a_buffer_state **state);
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
203
drivers/gpu/nvgpu/os/linux/dmabuf_priv.c
Normal file
203
drivers/gpu/nvgpu/os/linux/dmabuf_priv.c
Normal file
@@ -0,0 +1,203 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/device.h>
|
||||||
|
#include <linux/dma-buf.h>
|
||||||
|
#include <linux/scatterlist.h>
|
||||||
|
|
||||||
|
#include <nvgpu/comptags.h>
|
||||||
|
#include <nvgpu/enabled.h>
|
||||||
|
#include <nvgpu/gk20a.h>
|
||||||
|
#include <nvgpu/linux/vm.h>
|
||||||
|
#include <nvgpu/bug.h>
|
||||||
|
#include <nvgpu/fence.h>
|
||||||
|
|
||||||
|
#include "platform_gk20a.h"
|
||||||
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
|
#include "os_linux.h"
|
||||||
|
#include "dmabuf_vidmem.h"
|
||||||
|
|
||||||
|
struct sg_table *gk20a_mm_pin_has_drvdata(struct device *dev,
|
||||||
|
struct dma_buf *dmabuf,
|
||||||
|
struct dma_buf_attachment **attachment)
|
||||||
|
{
|
||||||
|
struct gk20a_dmabuf_priv *priv;
|
||||||
|
|
||||||
|
priv = dma_buf_get_drvdata(dmabuf, dev);
|
||||||
|
if (!priv) {
|
||||||
|
nvgpu_do_assert();
|
||||||
|
return ERR_PTR(-EINVAL);
|
||||||
|
}
|
||||||
|
|
||||||
|
nvgpu_mutex_acquire(&priv->lock);
|
||||||
|
|
||||||
|
if (priv->pin_count == 0) {
|
||||||
|
priv->attach = dma_buf_attach(dmabuf, dev);
|
||||||
|
if (IS_ERR(priv->attach)) {
|
||||||
|
nvgpu_mutex_release(&priv->lock);
|
||||||
|
return (struct sg_table *)priv->attach;
|
||||||
|
}
|
||||||
|
|
||||||
|
priv->sgt = dma_buf_map_attachment(priv->attach,
|
||||||
|
DMA_BIDIRECTIONAL);
|
||||||
|
if (IS_ERR(priv->sgt)) {
|
||||||
|
dma_buf_detach(dmabuf, priv->attach);
|
||||||
|
nvgpu_mutex_release(&priv->lock);
|
||||||
|
return priv->sgt;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
priv->pin_count++;
|
||||||
|
nvgpu_mutex_release(&priv->lock);
|
||||||
|
*attachment = priv->attach;
|
||||||
|
return priv->sgt;
|
||||||
|
}
|
||||||
|
|
||||||
|
void gk20a_mm_unpin_has_drvdata(struct device *dev,
|
||||||
|
struct dma_buf *dmabuf,
|
||||||
|
struct dma_buf_attachment *attachment,
|
||||||
|
struct sg_table *sgt)
|
||||||
|
{
|
||||||
|
struct gk20a_dmabuf_priv *priv = dma_buf_get_drvdata(dmabuf, dev);
|
||||||
|
dma_addr_t dma_addr;
|
||||||
|
|
||||||
|
if (IS_ERR(priv) || !priv)
|
||||||
|
return;
|
||||||
|
|
||||||
|
nvgpu_mutex_acquire(&priv->lock);
|
||||||
|
nvgpu_assert(priv->sgt == sgt);
|
||||||
|
nvgpu_assert(priv->attach == attachment);
|
||||||
|
priv->pin_count--;
|
||||||
|
nvgpu_assert(priv->pin_count >= 0);
|
||||||
|
dma_addr = sg_dma_address(priv->sgt->sgl);
|
||||||
|
if (priv->pin_count == 0) {
|
||||||
|
dma_buf_unmap_attachment(priv->attach, priv->sgt,
|
||||||
|
DMA_BIDIRECTIONAL);
|
||||||
|
dma_buf_detach(dmabuf, priv->attach);
|
||||||
|
}
|
||||||
|
nvgpu_mutex_release(&priv->lock);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void gk20a_mm_delete_priv(void *_priv)
|
||||||
|
{
|
||||||
|
struct gk20a_buffer_state *s, *s_tmp;
|
||||||
|
struct gk20a_dmabuf_priv *priv = _priv;
|
||||||
|
struct gk20a *g;
|
||||||
|
|
||||||
|
if (!priv)
|
||||||
|
return;
|
||||||
|
|
||||||
|
g = priv->g;
|
||||||
|
|
||||||
|
if (priv->comptags.allocated && priv->comptags.lines) {
|
||||||
|
WARN_ON(!priv->comptag_allocator);
|
||||||
|
gk20a_comptaglines_free(priv->comptag_allocator,
|
||||||
|
priv->comptags.offset,
|
||||||
|
priv->comptags.lines);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Free buffer states */
|
||||||
|
nvgpu_list_for_each_entry_safe(s, s_tmp, &priv->states,
|
||||||
|
gk20a_buffer_state, list) {
|
||||||
|
nvgpu_fence_put(s->fence);
|
||||||
|
nvgpu_list_del(&s->list);
|
||||||
|
nvgpu_kfree(g, s);
|
||||||
|
}
|
||||||
|
|
||||||
|
nvgpu_kfree(g, priv);
|
||||||
|
}
|
||||||
|
|
||||||
|
int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev)
|
||||||
|
{
|
||||||
|
struct gk20a *g = gk20a_get_platform(dev)->g;
|
||||||
|
struct gk20a_dmabuf_priv *priv;
|
||||||
|
|
||||||
|
priv = dma_buf_get_drvdata(dmabuf, dev);
|
||||||
|
if (likely(priv))
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
nvgpu_mutex_acquire(&g->mm.priv_lock);
|
||||||
|
priv = dma_buf_get_drvdata(dmabuf, dev);
|
||||||
|
if (priv)
|
||||||
|
goto priv_exist_or_err;
|
||||||
|
|
||||||
|
priv = nvgpu_kzalloc(g, sizeof(*priv));
|
||||||
|
if (!priv) {
|
||||||
|
priv = ERR_PTR(-ENOMEM);
|
||||||
|
goto priv_exist_or_err;
|
||||||
|
}
|
||||||
|
|
||||||
|
nvgpu_mutex_init(&priv->lock);
|
||||||
|
nvgpu_init_list_node(&priv->states);
|
||||||
|
priv->g = g;
|
||||||
|
dma_buf_set_drvdata(dmabuf, dev, priv, gk20a_mm_delete_priv);
|
||||||
|
|
||||||
|
priv_exist_or_err:
|
||||||
|
nvgpu_mutex_release(&g->mm.priv_lock);
|
||||||
|
if (IS_ERR(priv))
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
|
||||||
|
u64 offset, struct gk20a_buffer_state **state)
|
||||||
|
{
|
||||||
|
int err = 0;
|
||||||
|
struct gk20a_dmabuf_priv *priv;
|
||||||
|
struct gk20a_buffer_state *s;
|
||||||
|
struct device *dev = dev_from_gk20a(g);
|
||||||
|
|
||||||
|
if (offset >= (u64)dmabuf->size) {
|
||||||
|
nvgpu_do_assert();
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
|
||||||
|
if (err)
|
||||||
|
return err;
|
||||||
|
|
||||||
|
priv = dma_buf_get_drvdata(dmabuf, dev);
|
||||||
|
if (!priv) {
|
||||||
|
nvgpu_do_assert();
|
||||||
|
return -ENOSYS;
|
||||||
|
}
|
||||||
|
|
||||||
|
nvgpu_mutex_acquire(&priv->lock);
|
||||||
|
|
||||||
|
nvgpu_list_for_each_entry(s, &priv->states, gk20a_buffer_state, list)
|
||||||
|
if (s->offset == offset)
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
/* State not found, create state. */
|
||||||
|
s = nvgpu_kzalloc(g, sizeof(*s));
|
||||||
|
if (!s) {
|
||||||
|
err = -ENOMEM;
|
||||||
|
goto out;
|
||||||
|
}
|
||||||
|
|
||||||
|
s->offset = offset;
|
||||||
|
nvgpu_init_list_node(&s->list);
|
||||||
|
nvgpu_mutex_init(&s->lock);
|
||||||
|
nvgpu_list_add_tail(&s->list, &priv->states);
|
||||||
|
|
||||||
|
out:
|
||||||
|
nvgpu_mutex_release(&priv->lock);
|
||||||
|
if (!err)
|
||||||
|
*state = s;
|
||||||
|
return err;
|
||||||
|
}
|
||||||
99
drivers/gpu/nvgpu/os/linux/dmabuf_priv.h
Normal file
99
drivers/gpu/nvgpu/os/linux/dmabuf_priv.h
Normal file
@@ -0,0 +1,99 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef NVGPU_DMABUF_PRIV_H
|
||||||
|
#define NVGPU_DMABUF_PRIV_H
|
||||||
|
|
||||||
|
#ifdef CONFIG_NVGPU_DMABUF_HAS_DRVDATA
|
||||||
|
|
||||||
|
#include <nvgpu/comptags.h>
|
||||||
|
#include <nvgpu/list.h>
|
||||||
|
#include <nvgpu/lock.h>
|
||||||
|
#include <nvgpu/gmmu.h>
|
||||||
|
|
||||||
|
struct sg_table;
|
||||||
|
struct dma_buf;
|
||||||
|
struct dma_buf_attachment;
|
||||||
|
struct device;
|
||||||
|
|
||||||
|
struct gk20a;
|
||||||
|
|
||||||
|
struct gk20a_buffer_state {
|
||||||
|
struct nvgpu_list_node list;
|
||||||
|
|
||||||
|
/* The valid compbits and the fence must be changed atomically. */
|
||||||
|
struct nvgpu_mutex lock;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Offset of the surface within the dma-buf whose state is
|
||||||
|
* described by this struct (one dma-buf can contain multiple
|
||||||
|
* surfaces with different states).
|
||||||
|
*/
|
||||||
|
size_t offset;
|
||||||
|
|
||||||
|
/* A bitmask of valid sets of compbits (0 = uncompressed). */
|
||||||
|
u32 valid_compbits;
|
||||||
|
|
||||||
|
/* The ZBC color used on this buffer. */
|
||||||
|
u32 zbc_color;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This struct reflects the state of the buffer when this
|
||||||
|
* fence signals.
|
||||||
|
*/
|
||||||
|
struct nvgpu_fence_type *fence;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline struct gk20a_buffer_state *
|
||||||
|
gk20a_buffer_state_from_list(struct nvgpu_list_node *node)
|
||||||
|
{
|
||||||
|
return (struct gk20a_buffer_state *)
|
||||||
|
((uintptr_t)node - offsetof(struct gk20a_buffer_state, list));
|
||||||
|
};
|
||||||
|
|
||||||
|
struct gk20a_dmabuf_priv {
|
||||||
|
struct nvgpu_mutex lock;
|
||||||
|
|
||||||
|
struct gk20a *g;
|
||||||
|
|
||||||
|
struct gk20a_comptag_allocator *comptag_allocator;
|
||||||
|
struct gk20a_comptags comptags;
|
||||||
|
|
||||||
|
struct dma_buf_attachment *attach;
|
||||||
|
struct sg_table *sgt;
|
||||||
|
|
||||||
|
int pin_count;
|
||||||
|
|
||||||
|
struct nvgpu_list_node states;
|
||||||
|
|
||||||
|
u64 buffer_id;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct sg_table *gk20a_mm_pin_has_drvdata(struct device *dev,
|
||||||
|
struct dma_buf *dmabuf,
|
||||||
|
struct dma_buf_attachment **attachment);
|
||||||
|
|
||||||
|
void gk20a_mm_unpin_has_drvdata(struct device *dev,
|
||||||
|
struct dma_buf *dmabuf,
|
||||||
|
struct dma_buf_attachment *attachment,
|
||||||
|
struct sg_table *sgt);
|
||||||
|
|
||||||
|
int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev);
|
||||||
|
|
||||||
|
int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
|
||||||
|
u64 offset, struct gk20a_buffer_state **state);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms and conditions of the GNU General Public License,
|
* under the terms and conditions of the GNU General Public License,
|
||||||
@@ -14,8 +14,8 @@
|
|||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __NVGPU_LINUX_DMABUF_VIDMEM_H__
|
#ifndef NVGPU_DMABUF_VIDMEM_H
|
||||||
#define __NVGPU_LINUX_DMABUF_VIDMEM_H__
|
#define NVGPU_DMABUF_VIDMEM_H
|
||||||
|
|
||||||
#ifdef CONFIG_NVGPU_DGPU
|
#ifdef CONFIG_NVGPU_DGPU
|
||||||
|
|
||||||
|
|||||||
@@ -33,6 +33,7 @@
|
|||||||
#include "ioctl_channel.h"
|
#include "ioctl_channel.h"
|
||||||
#include "os_linux.h"
|
#include "os_linux.h"
|
||||||
#include "dmabuf.h"
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
|
|
||||||
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
|
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
|
||||||
|
|
||||||
@@ -399,10 +400,12 @@ int nvgpu_usermode_buf_from_dmabuf(struct gk20a *g, int dmabuf_fd,
|
|||||||
goto put_dmabuf;
|
goto put_dmabuf;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_NVGPU_DMABUF_HAS_DRVDATA
|
||||||
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
|
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
|
||||||
if (err != 0) {
|
if (err != 0) {
|
||||||
goto put_dmabuf;
|
goto put_dmabuf;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
sgt = gk20a_mm_pin(dev, dmabuf, &attachment);
|
sgt = gk20a_mm_pin(dev, dmabuf, &attachment);
|
||||||
if (IS_ERR(sgt)) {
|
if (IS_ERR(sgt)) {
|
||||||
|
|||||||
@@ -35,6 +35,7 @@
|
|||||||
#include "platform_gk20a.h"
|
#include "platform_gk20a.h"
|
||||||
#include "os_linux.h"
|
#include "os_linux.h"
|
||||||
#include "dmabuf.h"
|
#include "dmabuf.h"
|
||||||
|
#include "dmabuf_priv.h"
|
||||||
#include "dmabuf_vidmem.h"
|
#include "dmabuf_vidmem.h"
|
||||||
|
|
||||||
#define dev_from_vm(vm) dev_from_gk20a(vm->mm->g)
|
#define dev_from_vm(vm) dev_from_gk20a(vm->mm->g)
|
||||||
@@ -314,11 +315,13 @@ int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
|
|||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_NVGPU_DMABUF_HAS_DRVDATA
|
||||||
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev_from_vm(vm));
|
err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev_from_vm(vm));
|
||||||
if (err) {
|
if (err) {
|
||||||
dma_buf_put(dmabuf);
|
dma_buf_put(dmabuf);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
err = nvgpu_vm_map_linux(vm, dmabuf, *map_addr,
|
err = nvgpu_vm_map_linux(vm, dmabuf, *map_addr,
|
||||||
nvgpu_vm_translate_linux_flags(g, flags),
|
nvgpu_vm_translate_linux_flags(g, flags),
|
||||||
|
|||||||
Reference in New Issue
Block a user