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gpu: nvgpu: unit: add UT to trigger patch write with NULL ctx pointer

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Add new unit test to trigger context patch write with NULL context
pointer

Jira NVGPU-4778

Change-Id: Iea0366e9b12dbf3abbd8c9b4a1ebd29be5961516
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280502
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-01-16 17:54:19 +05:30
committed by Alex Waterman
parent bdaa8519d5
commit 755f0c7e96
2 changed files with 15 additions and 2 deletions
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12
userspace/units/gr/ctx/nvgpu-gr-ctx.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -190,12 +190,22 @@ int test_gr_ctx_error_injection(struct unit_module *m,
/* Update the patch buffer */ /* Update the patch buffer */
nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, true); nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, true);
/* Increase data count so that patch write fails */ /* Increase data count so that patch write fails */
gr_ctx->patch_ctx.data_count = 1000; gr_ctx->patch_ctx.data_count = 1000;
nvgpu_gr_ctx_patch_write(g, gr_ctx, 0, 0, true); nvgpu_gr_ctx_patch_write(g, gr_ctx, 0, 0, true);
/* Restore data count so that patch write passes */ /* Restore data count so that patch write passes */
gr_ctx->patch_ctx.data_count = 0; gr_ctx->patch_ctx.data_count = 0;
nvgpu_gr_ctx_patch_write(g, gr_ctx, 0, 0, true); nvgpu_gr_ctx_patch_write(g, gr_ctx, 0, 0, true);
/*
* Trigger patch write with NULL context, should fail.
* We currently don't have API to read contents of patch buffer
* hence can't verify yet.
*/
nvgpu_gr_ctx_patch_write(g, NULL, 0, 0xDEADBEEF, true);
nvgpu_gr_ctx_patch_write_end(g, gr_ctx, true); nvgpu_gr_ctx_patch_write_end(g, gr_ctx, true);
/* cleanup */ /* cleanup */

5
userspace/units/gr/ctx/nvgpu-gr-ctx.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -72,6 +72,9 @@ struct unit_module;
* - Disable error injection and map, should pass. * - Disable error injection and map, should pass.
* - Increase data count in patch context beyond max, write should fail. * - Increase data count in patch context beyond max, write should fail.
* - Set data count to 0, write should pass. * - Set data count to 0, write should pass.
* - Trigger patch write with NULL context pointer. Should fail. But since
* we don't have any API to read contents of Patch buffer, can't be
* verified yet.
* - Cleanup all the local resources. * - Cleanup all the local resources.
* *
* Output: Returns PASS if the steps above were executed successfully. FAIL * Output: Returns PASS if the steps above were executed successfully. FAIL