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gpu: nvgpu: pmu: check before initializing perfmon
We should check if perfmon is enabled before sending perfmon init command. This is needed for debug purposes. Change-Id: Ia95a590a76074c469b5d87a5820cd5b2e50d13be Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master/r/1510036 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -12,6 +12,7 @@
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*
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*/
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#include <nvgpu/enabled.h>
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#include "debug_pmu.h"
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#include "gk20a/platform_gk20a.h"
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@@ -348,10 +349,12 @@ static ssize_t perfmon_events_enable_write(struct file *file,
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if (err)
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return err;
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if (val && !g->pmu.perfmon_sampling_enabled) {
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if (val && !g->pmu.perfmon_sampling_enabled &&
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nvgpu_is_enabled(g, NVGPU_PMU_PERFMON)) {
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g->pmu.perfmon_sampling_enabled = true;
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nvgpu_pmu_perfmon_start_sampling(&(g->pmu));
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} else if (!val && g->pmu.perfmon_sampling_enabled) {
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} else if (!val && g->pmu.perfmon_sampling_enabled &&
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nvgpu_is_enabled(g, NVGPU_PMU_PERFMON)) {
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g->pmu.perfmon_sampling_enabled = false;
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nvgpu_pmu_perfmon_stop_sampling(&(g->pmu));
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}
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@@ -124,6 +124,7 @@ static void nvgpu_init_pm_vars(struct gk20a *g)
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g->support_pmu = support_gk20a_pmu(dev_from_gk20a(g));
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g->can_railgate = platform->can_railgate_init;
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g->railgate_delay = platform->railgate_delay_init;
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__nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, platform->enable_perfmon);
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/* set default values to aelpg parameters */
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g->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US;
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@@ -920,6 +920,7 @@ struct gk20a_platform gm20b_tegra_platform = {
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.enable_elcg = true,
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.enable_elpg = true,
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.enable_aelpg = true,
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.enable_perfmon = true,
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.ptimer_src_freq = 19200000,
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.force_reset_in_do_idle = false,
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@@ -377,6 +377,7 @@ struct gk20a_platform gp10b_tegra_platform = {
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.enable_slcg = true,
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.enable_elcg = true,
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.enable_aelpg = true,
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.enable_perfmon = true,
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/* ptimer src frequency in hz*/
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.ptimer_src_freq = 31250000,
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@@ -11,6 +11,7 @@
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* more details.
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*/
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#include <nvgpu/enabled.h>
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#include <nvgpu/pmu.h>
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#include <nvgpu/log.h>
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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@@ -844,7 +845,8 @@ int nvgpu_pmu_process_message(struct nvgpu_pmu *pmu)
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nvgpu_pmu_process_init_msg(pmu, &msg);
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if (g->ops.pmu.init_wpr_region != NULL)
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g->ops.pmu.init_wpr_region(g);
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nvgpu_pmu_init_perfmon(pmu);
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if (nvgpu_is_enabled(g, NVGPU_PMU_PERFMON))
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nvgpu_pmu_init_perfmon(pmu);
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return 0;
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}
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@@ -11,6 +11,7 @@
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* more details.
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*/
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#include <nvgpu/enabled.h>
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#include <nvgpu/pmu.h>
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#include <nvgpu/log.h>
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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@@ -60,6 +61,9 @@ int nvgpu_pmu_init_perfmon(struct nvgpu_pmu *pmu)
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struct pmu_payload payload;
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u32 seq;
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if (!nvgpu_is_enabled(g, NVGPU_PMU_PERFMON))
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return 0;
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nvgpu_log_fn(g, " ");
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pmu->perfmon_ready = 0;
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@@ -126,6 +130,9 @@ int nvgpu_pmu_perfmon_start_sampling(struct nvgpu_pmu *pmu)
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struct pmu_payload payload;
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u32 seq;
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if (!nvgpu_is_enabled(g, NVGPU_PMU_PERFMON))
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return 0;
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/* PERFMON Start */
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memset(&cmd, 0, sizeof(struct pmu_cmd));
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cmd.hdr.unit_id = get_perfmon_id(pmu);
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@@ -172,6 +179,9 @@ int nvgpu_pmu_perfmon_stop_sampling(struct nvgpu_pmu *pmu)
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struct pmu_cmd cmd;
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u32 seq;
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if (!nvgpu_is_enabled(g, NVGPU_PMU_PERFMON))
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return 0;
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/* PERFMON Stop */
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memset(&cmd, 0, sizeof(struct pmu_cmd));
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cmd.hdr.unit_id = get_perfmon_id(pmu);
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@@ -93,6 +93,9 @@ struct gk20a_platform {
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/* Adaptative ELPG: true = enable flase = disable */
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bool enable_aelpg;
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/* PMU Perfmon: true = enable false = disable */
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bool enable_perfmon;
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/* Memory System Clock Gating: true = enable flase = disable*/
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bool enable_mscg;
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@@ -37,6 +37,12 @@ struct gk20a;
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/* unified or split memory with separate vidmem? */
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#define NVGPU_MM_UNIFIED_MEMORY 18
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/*
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* PMU flags.
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*/
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/* perfmon enabled or disabled for PMU */
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#define NVGPU_PMU_PERFMON 48
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/*
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* Must be greater than the largest bit offset in the above list.
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*/
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