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gpu: nvgpu: move dump_ctxsw_stats_on_channel_close flag to gr_ctx_desc
Debug boolean flag dump_ctxsw_stats_on_channel_close is right now stored in gr_gk20a.ctx_vars struct This flag logically is property of gr.ctx units since it indicates whether each context should dump ctxsw stats on channel/context close Move this flag to struct nvgpu_gr_ctx_desc and remove it from gr_gk20a.ctx_vars Expose below API from gr.ctx unit to check if flag is set nvgpu_gr_ctx_desc_dump_ctxsw_stats_on_channel_close() Move debugfs creation code to create corresponding debugfs to gr_gk20a_debugfs_init() and change debugfs type from "u32" to "file" Struct gr.gr_ctx_desc is created only during first poweron. Return error if this struct is not available. Remove unnecessary initialization of this variable from platform specific probe functions Jira NVGPU-3112 Change-Id: Id675e047237f82e9b8198a42082e99c95824578f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099399 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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77140c1a84
@@ -969,3 +969,9 @@ bool nvgpu_gr_ctx_desc_force_preemption_cilp(struct nvgpu_gr_ctx_desc *gr_ctx_de
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{
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{
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return gr_ctx_desc->force_preemption_cilp;
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return gr_ctx_desc->force_preemption_cilp;
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}
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}
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bool nvgpu_gr_ctx_desc_dump_ctxsw_stats_on_channel_close(
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struct nvgpu_gr_ctx_desc *gr_ctx_desc)
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{
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return gr_ctx_desc->dump_ctxsw_stats_on_channel_close;
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}
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@@ -47,6 +47,8 @@ struct nvgpu_gr_ctx_desc {
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bool force_preemption_gfxp;
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bool force_preemption_gfxp;
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bool force_preemption_cilp;
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bool force_preemption_cilp;
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bool dump_ctxsw_stats_on_channel_close;
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};
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};
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struct nvgpu_gr_ctx {
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struct nvgpu_gr_ctx {
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@@ -181,7 +181,8 @@ void nvgpu_gr_setup_free_gr_ctx(struct gk20a *g,
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if (gr_ctx != NULL) {
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if (gr_ctx != NULL) {
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if ((g->ops.gr.ctxsw_prog.dump_ctxsw_stats != NULL) &&
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if ((g->ops.gr.ctxsw_prog.dump_ctxsw_stats != NULL) &&
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g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close) {
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nvgpu_gr_ctx_desc_dump_ctxsw_stats_on_channel_close(
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g->gr->gr_ctx_desc)) {
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g->ops.gr.ctxsw_prog.dump_ctxsw_stats(g,
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g->ops.gr.ctxsw_prog.dump_ctxsw_stats(g,
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nvgpu_gr_ctx_get_ctx_mem(gr_ctx));
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nvgpu_gr_ctx_get_ctx_mem(gr_ctx));
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}
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}
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@@ -91,8 +91,6 @@ struct nvgpu_gr {
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u32 preempt_image_size;
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u32 preempt_image_size;
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u32 zcull_image_size;
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u32 zcull_image_size;
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bool dump_ctxsw_stats_on_channel_close;
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} ctx_vars;
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} ctx_vars;
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struct nvgpu_mutex ctx_mutex; /* protect golden ctx init */
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struct nvgpu_mutex ctx_mutex; /* protect golden ctx init */
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@@ -236,4 +236,7 @@ bool nvgpu_gr_ctx_desc_force_preemption_gfxp(
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bool nvgpu_gr_ctx_desc_force_preemption_cilp(
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bool nvgpu_gr_ctx_desc_force_preemption_cilp(
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struct nvgpu_gr_ctx_desc *gr_ctx_desc);
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struct nvgpu_gr_ctx_desc *gr_ctx_desc);
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bool nvgpu_gr_ctx_desc_dump_ctxsw_stats_on_channel_close(
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struct nvgpu_gr_ctx_desc *gr_ctx_desc);
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#endif /* NVGPU_INCLUDE_GR_CTX_H */
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#endif /* NVGPU_INCLUDE_GR_CTX_H */
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@@ -411,11 +411,6 @@ void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink)
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l->debugfs,
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l->debugfs,
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&g->runlist_interleave);
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&g->runlist_interleave);
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l->debugfs_dump_ctxsw_stats =
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debugfs_create_bool("dump_ctxsw_stats_on_channel_close",
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S_IRUGO|S_IWUSR, l->debugfs,
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&g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close);
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gr_gk20a_debugfs_init(g);
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gr_gk20a_debugfs_init(g);
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gk20a_pmu_debugfs_init(g);
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gk20a_pmu_debugfs_init(g);
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gk20a_railgating_debugfs_init(g);
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gk20a_railgating_debugfs_init(g);
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@@ -149,6 +149,58 @@ static struct file_operations force_preemption_cilp_fops = {
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.write = force_preemption_cilp_write,
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.write = force_preemption_cilp_write,
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};
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};
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static ssize_t dump_ctxsw_stats_on_channel_close_read(struct file *file,
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char __user *user_buf, size_t count, loff_t *ppos)
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{
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char buf[3];
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struct gk20a *g = file->private_data;
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if (g->gr->gr_ctx_desc == NULL) {
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return -EFAULT;
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}
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if (g->gr->gr_ctx_desc->dump_ctxsw_stats_on_channel_close) {
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buf[0] = 'Y';
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} else {
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buf[0] = 'N';
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}
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buf[1] = '\n';
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buf[2] = 0x00;
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return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
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}
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static ssize_t dump_ctxsw_stats_on_channel_close_write(struct file *file,
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const char __user *user_buf, size_t count, loff_t *ppos)
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{
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char buf[32];
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int buf_size;
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bool val;
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struct gk20a *g = file->private_data;
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if (g->gr->gr_ctx_desc == NULL) {
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return -EFAULT;
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}
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buf_size = min(count, (sizeof(buf)-1));
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if (copy_from_user(buf, user_buf, buf_size)) {
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return -EFAULT;
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}
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if (strtobool(buf, &val) == 0) {
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g->gr->gr_ctx_desc->dump_ctxsw_stats_on_channel_close = val;
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}
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return count;
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}
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static struct file_operations dump_ctxsw_stats_on_channel_close_fops = {
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.open = simple_open,
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.read = dump_ctxsw_stats_on_channel_close_read,
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.write = dump_ctxsw_stats_on_channel_close_write,
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};
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int gr_gk20a_debugfs_init(struct gk20a *g)
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int gr_gk20a_debugfs_init(struct gk20a *g)
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{
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{
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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@@ -172,6 +224,13 @@ int gr_gk20a_debugfs_init(struct gk20a *g)
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if (!d)
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if (!d)
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return -ENOMEM;
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return -ENOMEM;
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d = debugfs_create_file(
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"dump_ctxsw_stats_on_channel_close", S_IRUGO|S_IWUSR,
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l->debugfs, g,
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&dump_ctxsw_stats_on_channel_close_fops);
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if (!d)
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return -ENOMEM;
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return 0;
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return 0;
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}
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}
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@@ -158,11 +158,6 @@ static int gp10b_tegra_probe(struct device *dev)
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platform->disable_bigpage = !dev->archdata.iommu;
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platform->disable_bigpage = !dev->archdata.iommu;
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platform->g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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platform->g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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gp10b_tegra_get_clocks(dev);
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gp10b_tegra_get_clocks(dev);
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nvgpu_linux_init_clk_support(platform->g);
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nvgpu_linux_init_clk_support(platform->g);
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@@ -86,11 +86,6 @@ static int gv11b_tegra_probe(struct device *dev)
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platform->disable_bigpage = !dev->archdata.iommu;
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platform->disable_bigpage = !dev->archdata.iommu;
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platform->g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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platform->g->gr->ctx_vars.dump_ctxsw_stats_on_channel_close
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= false;
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gp10b_tegra_get_clocks(dev);
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gp10b_tegra_get_clocks(dev);
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nvgpu_linux_init_clk_support(platform->g);
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nvgpu_linux_init_clk_support(platform->g);
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