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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
gpu: nvgpu: add supported preemptions to gpu characteristics
Add below flag fields to gpu characteristics to indicate supported and default preemption modes on platform for graphics and compute __u32 graphics_preemption_mode_flags; __u32 compute_preemption_mode_flags; __u32 default_graphics_preempt_mode; __u32 default_compute_preempt_mode; Add struct nvgpu_preemption_modes_rec to struct gr_gk20a to store these values locally Use platform specific get_preemption_mode_flags() to get the flags and define gk20a/gm20b specific get_preemption_mode_flags() API Bug 1646259 Change-Id: I80193c0d988dc93bd96585f9aa631fd817f4dfa3 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1133595 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Terje Bergstrom
parent
d868b65441
commit
771f742703
@@ -2142,6 +2142,17 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
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if (platform->clk_round_rate)
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gpu->max_freq = platform->clk_round_rate(g->dev, UINT_MAX);
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g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec);
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gpu->graphics_preemption_mode_flags =
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g->gr.preemption_mode_rec.graphics_preemption_mode_flags;
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gpu->compute_preemption_mode_flags =
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g->gr.preemption_mode_rec.compute_preemption_mode_flags;
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gpu->default_graphics_preempt_mode =
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g->gr.preemption_mode_rec.default_graphics_preempt_mode;
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gpu->default_compute_preempt_mode =
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g->gr.preemption_mode_rec.default_compute_preempt_mode;
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return 0;
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}
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@@ -257,6 +257,8 @@ struct gpu_ops {
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int (*set_preemption_mode)(struct channel_gk20a *ch,
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u32 graphics_preempt_mode,
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u32 compute_preempt_mode);
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int (*get_preemption_mode_flags)(struct gk20a *g,
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struct nvgpu_preemption_modes_rec *preemption_modes_rec);
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} gr;
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const char *name;
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struct {
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@@ -8659,6 +8659,22 @@ clean_up:
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return err;
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}
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static int gr_gk20a_get_preemption_mode_flags(struct gk20a *g,
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struct nvgpu_preemption_modes_rec *preemption_modes_rec)
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{
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preemption_modes_rec->graphics_preemption_mode_flags =
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NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
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preemption_modes_rec->compute_preemption_mode_flags =
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NVGPU_COMPUTE_PREEMPTION_MODE_WFI;
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preemption_modes_rec->default_graphics_preempt_mode =
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NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
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preemption_modes_rec->default_compute_preempt_mode =
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NVGPU_COMPUTE_PREEMPTION_MODE_WFI;
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return 0;
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}
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void gk20a_init_gr_ops(struct gpu_ops *gops)
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{
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gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg;
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@@ -8726,4 +8742,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
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gops->gr.update_sm_error_state = gk20a_gr_update_sm_error_state;
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gops->gr.clear_sm_error_state = gk20a_gr_clear_sm_error_state;
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gops->gr.suspend_contexts = gr_gk20a_suspend_contexts;
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gops->gr.get_preemption_mode_flags = gr_gk20a_get_preemption_mode_flags;
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}
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@@ -188,6 +188,14 @@ struct gr_gk20a_isr_data {
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u32 class_num;
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};
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struct nvgpu_preemption_modes_rec {
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u32 graphics_preemption_mode_flags; /* supported preemption modes */
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u32 compute_preemption_mode_flags; /* supported preemption modes */
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u32 default_graphics_preempt_mode; /* default mode */
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u32 default_compute_preempt_mode; /* default mode */
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};
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struct gr_gk20a {
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struct gk20a *g;
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struct {
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@@ -325,6 +333,7 @@ struct gr_gk20a {
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bool sw_ready;
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bool skip_ucode_init;
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struct nvgpu_preemption_modes_rec preemption_mode_rec;
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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struct gr_t18x t18x;
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#endif
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@@ -1345,6 +1345,23 @@ fail:
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return err;
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}
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static int gr_gm20b_get_preemption_mode_flags(struct gk20a *g,
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struct nvgpu_preemption_modes_rec *preemption_modes_rec)
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{
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preemption_modes_rec->graphics_preemption_mode_flags =
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NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
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preemption_modes_rec->compute_preemption_mode_flags = (
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NVGPU_COMPUTE_PREEMPTION_MODE_WFI |
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NVGPU_COMPUTE_PREEMPTION_MODE_CTA);
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preemption_modes_rec->default_graphics_preempt_mode =
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NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
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preemption_modes_rec->default_compute_preempt_mode =
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NVGPU_COMPUTE_PREEMPTION_MODE_CTA;
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return 0;
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}
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void gm20b_init_gr(struct gpu_ops *gops)
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{
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gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
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@@ -1417,4 +1434,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
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gops->gr.update_sm_error_state = gm20b_gr_update_sm_error_state;
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gops->gr.clear_sm_error_state = gm20b_gr_clear_sm_error_state;
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gops->gr.suspend_contexts = gr_gk20a_suspend_contexts;
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gops->gr.get_preemption_mode_flags = gr_gm20b_get_preemption_mode_flags;
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}
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@@ -187,6 +187,13 @@ struct nvgpu_gpu_characteristics {
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__u64 max_freq;
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/* supported preemption modes */
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__u32 graphics_preemption_mode_flags; /* NVGPU_GRAPHICS_PREEMPTION_MODE_* */
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__u32 compute_preemption_mode_flags; /* NVGPU_COMPUTE_PREEMPTION_MODE_* */
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/* default preemption modes */
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__u32 default_graphics_preempt_mode; /* NVGPU_GRAPHICS_PREEMPTION_MODE_* */
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__u32 default_compute_preempt_mode; /* NVGPU_COMPUTE_PREEMPTION_MODE_* */
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/* Notes:
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- This struct can be safely appended with new fields. However, always
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keep the structure size multiple of 8 and make sure that the binary
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