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gpu: nvgpu: update pbdma_acquire intr handling

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To reduce duplication of pbdma_handle_intr_0_legacy to new chips, this
patch makes handle_intr_0_acquire as a HAL.

JIRA NVGPU-9325

Change-Id: I225318d45078367d09fc114202d9aeb0f1be374b
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2844872
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2023-01-17 11:56:27 +00:00
committed by mobile promotions
parent 6fffdddb7a
commit 77841cc9bb
5 changed files with 38 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b.h
View File

@@ -68,6 +68,8 @@ void ga10b_pbdma_dump_status(struct gk20a *g, struct nvgpu_debug_context *o);
u32 ga10b_pbdma_get_mmu_fault_id(struct gk20a *g, u32 pbdma_id);
u32 ga10b_pbdma_get_num_of_pbdmas(void);
bool ga10b_pbdma_handle_intr_0_acquire(struct gk20a *g, u32 pbdma_id,
u32 pbdma_intr_0, u32 *error_notifier);
u32 ga10b_pbdma_intr_0_en_set_tree_mask(void);
u32 ga10b_pbdma_intr_0_en_clear_tree_mask(void);

51
drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b_fusa.c
View File

@@ -437,25 +437,9 @@ static bool ga10b_pbdma_handle_intr_0_legacy(struct gk20a *g, u32 pbdma_id,
recover = true;
}
if ((pbdma_intr_0 & pbdma_intr_0_acquire_pending_f()) != 0U) {
u32 val = nvgpu_readl(g, pbdma_acquire_r(pbdma_id));
val &= ~pbdma_acquire_timeout_en_enable_f();
nvgpu_writel(g, pbdma_acquire_r(pbdma_id), val);
if (nvgpu_is_timeouts_enabled(g)) {
recover = true;
nvgpu_err(g, "semaphore acquire timeout!");
gk20a_debug_dump(g);
/*
* Note: the error_notifier can be overwritten if
* semaphore_timeout is triggered with pbcrc_pending
* interrupt below
*/
*error_notifier =
NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT;
}
if (g->ops.pbdma.handle_intr_0_acquire != NULL) {
recover = g->ops.pbdma.handle_intr_0_acquire(g, pbdma_id,
pbdma_intr_0, error_notifier);
}
if ((pbdma_intr_0 & pbdma_intr_0_pbentry_pending_f()) != 0U) {
@@ -640,3 +624,32 @@ u32 ga10b_pbdma_get_num_of_pbdmas(void)
{
return pbdma_cfg0__size_1_v();
}
bool ga10b_pbdma_handle_intr_0_acquire(struct gk20a *g, u32 pbdma_id,
u32 pbdma_intr_0, u32 *error_notifier)
{
bool recover = false;
if ((pbdma_intr_0 & pbdma_intr_0_acquire_pending_f()) != 0U) {
u32 val = nvgpu_readl(g, pbdma_acquire_r(pbdma_id));
val &= ~pbdma_acquire_timeout_en_enable_f();
nvgpu_writel(g, pbdma_acquire_r(pbdma_id), val);
if (nvgpu_is_timeouts_enabled(g)) {
recover = true;
nvgpu_err(g, "semaphore acquire timeout!");
gk20a_debug_dump(g);
/*
* Note: the error_notifier can be overwritten if
* semaphore_timeout is triggered with pbcrc_pending
* interrupt below
*/
*error_notifier =
NVGPU_ERR_NOTIFIER_GR_SEMAPHORE_TIMEOUT;
}
}
return recover;
}

1
drivers/gpu/nvgpu/hal/init/hal_ga100.c
View File

@@ -1054,6 +1054,7 @@ static const struct gops_pbdma ga100_ops_pbdma = {
.dump_status = ga10b_pbdma_dump_status,
#endif
.handle_intr_0 = ga10b_pbdma_handle_intr_0,
.handle_intr_0_acquire = ga10b_pbdma_handle_intr_0_acquire,
.handle_intr_1 = ga10b_pbdma_handle_intr_1,
.handle_intr = ga10b_pbdma_handle_intr,
.dump_intr_0 = ga10b_pbdma_dump_intr_0,

1
drivers/gpu/nvgpu/hal/init/hal_ga10b.c
View File

@@ -1072,6 +1072,7 @@ static const struct gops_pbdma ga10b_ops_pbdma = {
.dump_status = ga10b_pbdma_dump_status,
#endif
.handle_intr_0 = ga10b_pbdma_handle_intr_0,
.handle_intr_0_acquire = ga10b_pbdma_handle_intr_0_acquire,
.handle_intr_1 = ga10b_pbdma_handle_intr_1,
.handle_intr = ga10b_pbdma_handle_intr,
.dump_intr_0 = ga10b_pbdma_dump_intr_0,

2
drivers/gpu/nvgpu/include/nvgpu/gops/pbdma.h
View File

@@ -94,6 +94,8 @@ struct gops_pbdma {
u32 (*get_num_of_pbdmas)(void);
void (*report_error)(struct gk20a *g, u32 pbdma_id,
u32 pbdma_intr_0);
bool (*handle_intr_0_acquire)(struct gk20a *g, u32 pbdma_id,
u32 pbdma_intr_0, u32 *error_notifier);
/** NON FUSA */
void (*syncpt_debug_dump)(struct gk20a *g,