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gpu: nvgpu: fix misra 18.4 violations

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This change eliminates MISRA Advisory Rule 18.4
violations in the following by accessing g->fifo.channel
with array indexing:

 * nvgpu_channel_init_support()
 * nvgpu_channel_semaphore_wakeup()

Advisory Rule 18.4 states that the +, -, +=, and -=
operators should not be applied to an expression
of pointer type.

JIRA NVGPU-3798

Change-Id: I6b1bf360db6ec25894cc0ea430c33067e0cddf64
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2207550
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2019-09-27 15:11:38 -07:00
committed by Alex Waterman
parent 7985a281de
commit 77ffea99bd
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nvgpu/common/fifo/channel.c
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@@ -2491,7 +2491,7 @@ void nvgpu_channel_cleanup_sw(struct gk20a *g)
int nvgpu_channel_init_support(struct gk20a *g, u32 chid)
{
struct nvgpu_channel *c = g->fifo.channel+chid;
struct nvgpu_channel *c = &g->fifo.channel[chid];
int err;
c->g = NULL;
@@ -2684,7 +2684,7 @@ void nvgpu_channel_semaphore_wakeup(struct gk20a *g, bool post_events)
nvgpu_assert(g->ops.mm.cache.fb_flush(g) == 0);
for (chid = 0; chid < f->num_channels; chid++) {
struct nvgpu_channel *c = g->fifo.channel+chid;
struct nvgpu_channel *c = &g->fifo.channel[chid];
if (nvgpu_channel_get(c) != NULL) {
if (nvgpu_atomic_read(&c->bound) != 0) {