From 7852d452ee6f652c86cc431c4faad69f939ae3c9 Mon Sep 17 00:00:00 2001 From: vinodg Date: Wed, 5 Feb 2020 16:25:57 -0800 Subject: [PATCH] gpu: nvgpu: Add test to cover FECS watchdog timeout Add unit test to cover the FECS watch timeout method in gm20b. Correct the file and function name to gm20b from gk20a. Bug 200586923 Change-Id: I447e26c7d898f3967ad2de7a7e4a7457264941b5 Signed-off-by: vinodg Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290643 Tested-by: mobile promotions Reviewed-by: mobile promotions --- drivers/gpu/nvgpu/libnvgpu-drv_safe.export | 1 + userspace/SWUTS.h | 2 +- userspace/SWUTS.sources | 2 +- userspace/required_tests.json | 4 +- userspace/units/gr/falcon/Makefile | 4 +- userspace/units/gr/falcon/Makefile.tmk | 4 +- ...falcon-gk20a.c => nvgpu-gr-falcon-gm20b.c} | 45 ++++++++++++++----- ...falcon-gk20a.h => nvgpu-gr-falcon-gm20b.h} | 13 +++--- userspace/units/gr/falcon/nvgpu-gr-falcon.c | 6 +-- 9 files changed, 54 insertions(+), 27 deletions(-) rename userspace/units/gr/falcon/{nvgpu-gr-falcon-gk20a.c => nvgpu-gr-falcon-gm20b.c} (84%) rename userspace/units/gr/falcon/{nvgpu-gr-falcon-gk20a.h => nvgpu-gr-falcon-gm20b.h} (86%) diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index f43ba05b9..efd5a4e52 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -82,6 +82,7 @@ gm20b_priv_ring_enum_ltc gm20b_priv_ring_get_gpc_count gm20b_priv_ring_get_fbp_count gm20b_gr_falcon_submit_fecs_method_op +gm20b_gr_falcon_ctrl_ctxsw gm20b_bus_bar1_bind gp10b_bus_bar2_bind gp10b_ce_nonstall_isr diff --git a/userspace/SWUTS.h b/userspace/SWUTS.h index d392f7bc5..8a07f7bdd 100644 --- a/userspace/SWUTS.h +++ b/userspace/SWUTS.h @@ -143,7 +143,7 @@ * - @ref SWUTS-gr-intr * - @ref SWUTS-gr-init-hal-gv11b * - @ref SWUTS-gr-falcon - * - @ref SWUTS-gr-falcon-gk20a + * - @ref SWUTS-gr-falcon-gm20b * - @ref SWUTS-gr-fs-state * - @ref SWUTS-gr-global-ctx * - @ref SWUTS-gr-ctx diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index 388246383..e040fc47b 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -115,7 +115,7 @@ INPUT += ../../../userspace/units/gr/setup/nvgpu-gr-setup.h INPUT += ../../../userspace/units/gr/intr/nvgpu-gr-intr.h INPUT += ../../../userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.h INPUT += ../../../userspace/units/gr/falcon/nvgpu-gr-falcon.h -INPUT += ../../../userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.h +INPUT += ../../../userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.h INPUT += ../../../userspace/units/gr/fs_state/nvgpu-gr-fs-state.h INPUT += ../../../userspace/units/gr/global_ctx/nvgpu-gr-global-ctx.h INPUT += ../../../userspace/units/gr/ctx/nvgpu-gr-ctx.h diff --git a/userspace/required_tests.json b/userspace/required_tests.json index 9d44ff2f9..d3b81641f 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -2700,8 +2700,8 @@ "test_level": 0 }, { - "test": "test_gr_falcon_gk20a_ctrl_ctxsw", - "case": "gr_falcon_gk20a_ctrl_ctxsw", + "test": "test_gr_falcon_gm20b_ctrl_ctxsw", + "case": "gr_falcon_gm20b_ctrl_ctxsw", "unit": "nvgpu_gr_falcon", "test_level": 0 }, diff --git a/userspace/units/gr/falcon/Makefile b/userspace/units/gr/falcon/Makefile index e173dfc1a..4a0124aab 100644 --- a/userspace/units/gr/falcon/Makefile +++ b/userspace/units/gr/falcon/Makefile @@ -1,4 +1,4 @@ -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), @@ -21,7 +21,7 @@ .SUFFIXES: OBJS = nvgpu-gr-falcon.o \ - nvgpu-gr-falcon-gk20a.o + nvgpu-gr-falcon-gm20b.o MODULE = nvgpu-gr-falcon diff --git a/userspace/units/gr/falcon/Makefile.tmk b/userspace/units/gr/falcon/Makefile.tmk index ca5ec99b3..2eb7db5c9 100644 --- a/userspace/units/gr/falcon/Makefile.tmk +++ b/userspace/units/gr/falcon/Makefile.tmk @@ -1,6 +1,6 @@ ################################### tell Emacs this is a -*- makefile-gmake -*- # -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), @@ -26,7 +26,7 @@ NVGPU_UNIT_NAME = nvgpu-gr-falcon NVGPU_UNIT_SRCS = nvgpu-gr-falcon.c \ - nvgpu-gr-falcon-gk20a.c + nvgpu-gr-falcon-gm20b.c NVGPU_UNIT_INTERFACE_DIRS := \ $(NV_COMPONENT_DIR)/.. \ diff --git a/userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.c b/userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.c similarity index 84% rename from userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.c rename to userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.c index 23983c864..f984405a5 100644 --- a/userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.c +++ b/userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.c @@ -43,9 +43,9 @@ #include "hal/gr/falcon/gr_falcon_gm20b.h" #include "../nvgpu-gr.h" -#include "nvgpu-gr-falcon-gk20a.h" +#include "nvgpu-gr-falcon-gm20b.h" -struct gr_falcon_gk20a_fecs_op { +struct gr_falcon_gm20b_fecs_op { u32 id; u32 data; u32 ok; @@ -60,7 +60,13 @@ static void gr_falcon_fecs_dump_stats(struct gk20a *g) /* Do Nothing */ } -static int gr_falcon_gk20a_submit_fecs_mthd_op(struct unit_module *m, +static int gr_falcon_ctrl_ctxsw_stub(struct gk20a *g, u32 fecs_method, + u32 data, u32 *ret_val) +{ + return -EINVAL; +} + +static int gr_falcon_gm20b_submit_fecs_mthd_op(struct unit_module *m, struct gk20a *g) { int err, i; @@ -72,7 +78,7 @@ static int gr_falcon_gk20a_submit_fecs_mthd_op(struct unit_module *m, .cond.fail = GR_IS_UCODE_OP_SKIP, }; - struct gr_falcon_gk20a_fecs_op fecs_op_stat[] = { + struct gr_falcon_gm20b_fecs_op fecs_op_stat[] = { [0] = { .id = 4U, .data = 0U, @@ -147,7 +153,7 @@ static int gr_falcon_gk20a_submit_fecs_mthd_op(struct unit_module *m, }, }; int arry_cnt = sizeof(fecs_op_stat)/ - sizeof(struct gr_falcon_gk20a_fecs_op); + sizeof(struct gr_falcon_gm20b_fecs_op); g->ops.gr.falcon.dump_stats = gr_falcon_fecs_dump_stats; for (i = 0; i < arry_cnt; i++) { @@ -177,6 +183,9 @@ static int gr_falcon_timer_init_error(struct unit_module *m, struct nvgpu_gr_falcon_query_sizes sizes; struct nvgpu_posix_fault_inj *timer_fi = nvgpu_timers_get_fault_injection(); + int (*gr_falcon_ctrl_ctxsw_local)(struct gk20a *g, + u32 fecs_method, + u32 data, u32 *ret_val); nvgpu_posix_enable_fault_injection(timer_fi, true, 0); err = g->ops.gr.falcon.wait_mem_scrubbing(g); @@ -233,6 +242,15 @@ static int gr_falcon_timer_init_error(struct unit_module *m, } nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); + gr_falcon_ctrl_ctxsw_local = g->ops.gr.falcon.ctrl_ctxsw; + g->ops.gr.falcon.ctrl_ctxsw = gr_falcon_ctrl_ctxsw_stub; + err = g->ops.gr.falcon.wait_ctxsw_ready(g); + if (err == 0) { + unit_return_fail(m, + "gr_falcon_wait_ctxsw_ready failed\n"); + } + g->ops.gr.falcon.ctrl_ctxsw = gr_falcon_ctrl_ctxsw_local; + err = g->ops.gr.falcon.wait_ctxsw_ready(g); if (err != 0) { unit_return_fail(m, @@ -242,22 +260,29 @@ static int gr_falcon_timer_init_error(struct unit_module *m, return UNIT_SUCCESS; } -int test_gr_falcon_gk20a_ctrl_ctxsw(struct unit_module *m, +int test_gr_falcon_gm20b_ctrl_ctxsw(struct unit_module *m, struct gk20a *g, void *args) { int err = 0; u32 data = 0; + err = gm20b_gr_falcon_ctrl_ctxsw(g, + NVGPU_GR_FALCON_METHOD_SET_WATCHDOG_TIMEOUT, data, NULL); + if (err) { + unit_return_fail(m, + "falcon_gm20b_ctrl_ctxsw watchdog timeout failed\n"); + } + err = g->ops.gr.falcon.ctrl_ctxsw(g, NVGPU_GR_FALCON_METHOD_GOLDEN_IMAGE_SAVE, data, NULL); if (err) { - unit_return_fail(m, "falcon_gk20a_ctrl_ctxsw failed\n"); + unit_return_fail(m, "falcon_gm20b_ctrl_ctxsw failed\n"); } /* Invalid Method */ err = g->ops.gr.falcon.ctrl_ctxsw(g, 0, data, NULL); if (err) { - unit_return_fail(m, "falcon_gk20a_ctrl_ctxsw failed\n"); + unit_return_fail(m, "falcon_gm20b_ctrl_ctxsw failed\n"); } err = gr_falcon_timer_init_error(m, g); @@ -265,9 +290,9 @@ int test_gr_falcon_gk20a_ctrl_ctxsw(struct unit_module *m, unit_return_fail(m, "gr_falcon_timer_init_error failed\n"); } - err = gr_falcon_gk20a_submit_fecs_mthd_op(m, g); + err = gr_falcon_gm20b_submit_fecs_mthd_op(m, g); if (err) { - unit_return_fail(m, "gr_falcon_gk20a_fecs_mthd_op failed\n"); + unit_return_fail(m, "gr_falcon_gm20b_fecs_mthd_op failed\n"); } return UNIT_SUCCESS; diff --git a/userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.h b/userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.h similarity index 86% rename from userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.h rename to userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.h index 61e60c90d..59f052313 100644 --- a/userspace/units/gr/falcon/nvgpu-gr-falcon-gk20a.h +++ b/userspace/units/gr/falcon/nvgpu-gr-falcon-gm20b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -19,22 +19,22 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef UNIT_NVGPU_GR_FALCON_GK20A_H -#define UNIT_NVGPU_GR_FALCON_GK20A_H +#ifndef UNIT_NVGPU_GR_FALCON_GM20B_H +#define UNIT_NVGPU_GR_FALCON_GM20B_H #include struct unit_module; struct gk20a; -/** @addtogroup SWUTS-gr-falcon-gk20a +/** @addtogroup SWUTS-gr-falcon-gm20b * @{ * * Software Unit Test Specification for common.gr.falcon */ /** - * Test specification for: test_gr_falcon_gk20a_ctrl_ctxsw + * Test specification for: test_gr_falcon_gm20b_ctrl_ctxsw * * Description: Helps to verify various failure and conditional checking * in falcon gm20b hal functions. @@ -51,6 +51,7 @@ struct gk20a; * gm20b_gr_falcon_ctrl_ctxsw * * Steps: + * - Call gm20b_gr_falcon_ctrl_ctxsw with watchdog timeout Method. * - Call g->ops.gr.falcon.ctrl_ctxsw with Invalid Method. * - Enable timer init failure injection in various functions. * - g->ops.gr.falcon.wait_ctxsw_ready. @@ -62,7 +63,7 @@ struct gk20a; * * Output: Returns PASS if all branches gave expected results. FAIL otherwise. */ -int test_gr_falcon_gk20a_ctrl_ctxsw(struct unit_module *m, +int test_gr_falcon_gm20b_ctrl_ctxsw(struct unit_module *m, struct gk20a *g, void *args); /** * @} diff --git a/userspace/units/gr/falcon/nvgpu-gr-falcon.c b/userspace/units/gr/falcon/nvgpu-gr-falcon.c index e046b2af4..c32d361ba 100644 --- a/userspace/units/gr/falcon/nvgpu-gr-falcon.c +++ b/userspace/units/gr/falcon/nvgpu-gr-falcon.c @@ -46,7 +46,7 @@ #include "hal/gr/falcon/gr_falcon_gm20b.h" #include "../nvgpu-gr.h" -#include "nvgpu-gr-falcon-gk20a.h" +#include "nvgpu-gr-falcon-gm20b.h" #include "nvgpu-gr-falcon.h" struct gr_gops_falcon_orgs { @@ -372,8 +372,8 @@ struct unit_module_test nvgpu_gr_falcon_tests[] = { test_gr_falcon_init_ctx_state, NULL, 0), UNIT_TEST(gr_falcon_fail_ctxsw_ucode, test_gr_falcon_fail_ctxsw_ucode, NULL, 0), - UNIT_TEST(gr_falcon_gk20a_ctrl_ctxsw, - test_gr_falcon_gk20a_ctrl_ctxsw, NULL, 0), + UNIT_TEST(gr_falcon_gm20b_ctrl_ctxsw, + test_gr_falcon_gm20b_ctrl_ctxsw, NULL, 0), UNIT_TEST(gr_falcon_deinit, test_gr_falcon_deinit, NULL, 0), };