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gpu: nvgpu: vgpu: support additional notifications
Client notification support is now added for the following: - stalling and non-stalling GR sema release - non-stalling FIFO channel intr - non-stalling CE2 nonblockpipe intr Bug 200097077 Change-Id: Icd3c076d7880e1c9ef1fcc0fc58eed9f23f39277 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/736064 (cherry picked from commit 0585d1f14d5a5ae1ccde8ccb7b7daa5593b3d1bc) Reviewed-on: http://git-master/r/759824 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Terje Bergstrom
parent
f877d0649c
commit
788776c9aa
@@ -251,9 +251,13 @@ enum {
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TEGRA_VGPU_GR_INTR_CLASS_ERROR,
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TEGRA_VGPU_GR_INTR_FIRMWARE_METHOD,
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TEGRA_VGPU_GR_INTR_EXCEPTION,
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TEGRA_VGPU_GR_INTR_SEMAPHORE,
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TEGRA_VGPU_FIFO_INTR_PBDMA,
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TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT,
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TEGRA_VGPU_FIFO_INTR_MMU_FAULT
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TEGRA_VGPU_FIFO_INTR_MMU_FAULT,
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TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE,
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TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL,
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TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE
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};
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struct tegra_vgpu_gr_intr_info {
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@@ -261,14 +265,30 @@ struct tegra_vgpu_gr_intr_info {
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u32 chid;
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};
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struct tegra_vgpu_gr_nonstall_intr_info {
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u32 type;
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};
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struct tegra_vgpu_fifo_intr_info {
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u32 type;
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u32 chid;
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};
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struct tegra_vgpu_fifo_nonstall_intr_info {
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u32 type;
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};
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struct tegra_vgpu_ce2_nonstall_intr_info {
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u32 type;
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};
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enum {
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TEGRA_VGPU_INTR_GR = 0,
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TEGRA_VGPU_INTR_FIFO
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TEGRA_VGPU_INTR_FIFO,
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TEGRA_VGPU_INTR_CE2,
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TEGRA_VGPU_NONSTALL_INTR_GR,
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TEGRA_VGPU_NONSTALL_INTR_FIFO,
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TEGRA_VGPU_NONSTALL_INTR_CE2
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};
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enum {
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@@ -281,7 +301,10 @@ struct tegra_vgpu_intr_msg {
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u32 unit;
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union {
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struct tegra_vgpu_gr_intr_info gr_intr;
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struct tegra_vgpu_gr_nonstall_intr_info gr_nonstall_intr;
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struct tegra_vgpu_fifo_intr_info fifo_intr;
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struct tegra_vgpu_fifo_nonstall_intr_info fifo_nonstall_intr;
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struct tegra_vgpu_ce2_nonstall_intr_info ce2_nonstall_intr;
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} info;
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};
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