From 78c7e601f81d3945532b62cc7fd81ccc4e440ec6 Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Fri, 10 May 2019 17:12:28 -0400 Subject: [PATCH] gpu: nvgpu: debug: fix MISRA 5.7 violation MISRA 5.7 requires tag names be unique. Rename the struct gk20a_debug_output to nvgpu_debug_context to avoid name collision with the function of the same name. JIRA NVGPU-3346 Change-Id: I9566b9dc6a7d090e87d9a09f6b8faf688589fbbd Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2116877 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/channel.c | 2 +- drivers/gpu/nvgpu/common/fifo/channel_gk20a.c | 2 +- drivers/gpu/nvgpu/common/fifo/channel_gk20a.h | 4 ++-- drivers/gpu/nvgpu/common/fifo/channel_gv11b.c | 2 +- drivers/gpu/nvgpu/common/fifo/channel_gv11b.h | 4 ++-- drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c | 2 +- drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.h | 4 ++-- drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c | 2 +- drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.h | 4 ++-- drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c | 4 ++-- drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.h | 6 +++--- drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c | 2 +- drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.h | 2 +- drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c | 2 +- drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h | 4 ++-- drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c | 6 +++--- drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.h | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/channel.h | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/debug.h | 13 +++++++------ drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 12 ++++++------ drivers/gpu/nvgpu/os/linux/debug.c | 14 +++++++------- 21 files changed, 50 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c index 7d3bf83e3..3c95cafe2 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel.c +++ b/drivers/gpu/nvgpu/common/fifo/channel.c @@ -2586,7 +2586,7 @@ void nvgpu_channel_free_inst(struct gk20a *g, struct nvgpu_channel *ch) } void nvgpu_channel_debug_dump_all(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { struct nvgpu_fifo *f = &g->fifo; u32 chid; diff --git a/drivers/gpu/nvgpu/common/fifo/channel_gk20a.c b/drivers/gpu/nvgpu/common/fifo/channel_gk20a.c index cccb5c0e1..9a69593d2 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel_gk20a.c +++ b/drivers/gpu/nvgpu/common/fifo/channel_gk20a.c @@ -107,7 +107,7 @@ void gk20a_channel_read_state(struct gk20a *g, struct nvgpu_channel *ch, } void gk20a_channel_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info) { gk20a_debug_output(o, "Channel ID: %d, TSG ID: %u, pid %d, refs %d; " diff --git a/drivers/gpu/nvgpu/common/fifo/channel_gk20a.h b/drivers/gpu/nvgpu/common/fifo/channel_gk20a.h index dbe0843bd..773137cb2 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel_gk20a.h +++ b/drivers/gpu/nvgpu/common/fifo/channel_gk20a.h @@ -26,7 +26,7 @@ struct gk20a; struct nvgpu_channel; struct nvgpu_channel_hw_state; -struct gk20a_debug_output; +struct nvgpu_debug_context; struct nvgpu_channel_dump_info; void gk20a_channel_enable(struct nvgpu_channel *ch); @@ -36,6 +36,6 @@ void gk20a_channel_read_state(struct gk20a *g, struct nvgpu_channel *ch, struct nvgpu_channel_hw_state *state); void gk20a_channel_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info); #endif /* FIFO_CHANNEL_GK20A_H */ diff --git a/drivers/gpu/nvgpu/common/fifo/channel_gv11b.c b/drivers/gpu/nvgpu/common/fifo/channel_gv11b.c index 037b4ae53..397ee4a52 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel_gv11b.c +++ b/drivers/gpu/nvgpu/common/fifo/channel_gv11b.c @@ -82,7 +82,7 @@ void gv11b_channel_reset_faulted(struct gk20a *g, struct nvgpu_channel *ch, } void gv11b_channel_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info) { gk20a_debug_output(o, "%d-%s, TSG: %u, pid %d, refs: %d%s: ", diff --git a/drivers/gpu/nvgpu/common/fifo/channel_gv11b.h b/drivers/gpu/nvgpu/common/fifo/channel_gv11b.h index 5e1f7b3b6..d3162ef36 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel_gv11b.h +++ b/drivers/gpu/nvgpu/common/fifo/channel_gv11b.h @@ -28,7 +28,7 @@ struct gk20a; struct nvgpu_channel; struct nvgpu_channel_hw_state; -struct gk20a_debug_output; +struct nvgpu_debug_context; struct nvgpu_channel_dump_info; void gv11b_channel_unbind(struct nvgpu_channel *ch); @@ -39,6 +39,6 @@ void gv11b_channel_reset_faulted(struct gk20a *g, struct nvgpu_channel *ch, bool eng, bool pbdma); void gv11b_channel_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info); #endif /* FIFO_CHANNEL_GV11B_H */ diff --git a/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c b/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c index bb77cb4e4..f8d3adaf6 100644 --- a/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c +++ b/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c @@ -168,7 +168,7 @@ void gm20b_read_engine_status_info(struct gk20a *g, u32 engine_id, } } -void gm20b_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o) +void gm20b_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o) { u32 i, host_num_engines; struct nvgpu_engine_status_info engine_status; diff --git a/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.h b/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.h index 2d2cc88d1..a6ce150ab 100644 --- a/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.h +++ b/drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.h @@ -27,12 +27,12 @@ struct gk20a; struct nvgpu_engine_status_info; -struct gk20a_debug_output; +struct nvgpu_debug_context; void gm20b_read_engine_status_info(struct gk20a *g, u32 engine_id, struct nvgpu_engine_status_info *status); -void gm20b_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o); +void gm20b_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o); #endif /* NVGPU_ENGINE_STATUS_GM20B_H */ diff --git a/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c b/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c index 5e056904f..a81315e6d 100644 --- a/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c +++ b/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c @@ -44,7 +44,7 @@ void gv100_read_engine_status_info(struct gk20a *g, u32 engine_id, return; } -void gv100_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o) +void gv100_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o) { u32 i, host_num_engines; struct nvgpu_engine_status_info engine_status; diff --git a/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.h b/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.h index 9086f5e32..272450ca3 100644 --- a/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.h +++ b/drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.h @@ -27,12 +27,12 @@ struct gk20a; struct nvgpu_engine_status_info; -struct gk20a_debug_output; +struct nvgpu_debug_context; void gv100_read_engine_status_info(struct gk20a *g, u32 engine_id, struct nvgpu_engine_status_info *status); -void gv100_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o); +void gv100_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o); #endif /* NVGPU_ENGINE_STATUS_GV100_H */ diff --git a/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c b/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c index 5edcd6051..a095304db 100644 --- a/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c +++ b/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c @@ -314,7 +314,7 @@ u32 gm20b_pbdma_acquire_val(u64 timeout) return val; } -void gm20b_pbdma_dump_status(struct gk20a *g, struct gk20a_debug_output *o) +void gm20b_pbdma_dump_status(struct gk20a *g, struct nvgpu_debug_context *o) { u32 i, host_num_pbdma; struct nvgpu_pbdma_status_info pbdma_status; @@ -475,7 +475,7 @@ bool gm20b_pbdma_handle_intr(struct gk20a *g, u32 pbdma_id, } void gm20b_pbdma_syncpoint_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info) { #ifdef CONFIG_TEGRA_GK20A_NVHOST diff --git a/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.h b/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.h index f4a512aaa..9c97135ec 100644 --- a/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.h +++ b/drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.h @@ -26,7 +26,7 @@ #include struct gk20a; -struct gk20a_debug_output; +struct nvgpu_debug_context; struct nvgpu_channel_dump_info; struct nvgpu_gpfifo_entry; @@ -44,7 +44,7 @@ void gm20b_pbdma_reset_header(struct gk20a *g, u32 pbdma_id); void gm20b_pbdma_reset_method(struct gk20a *g, u32 pbdma_id, u32 pbdma_method_index); u32 gm20b_pbdma_acquire_val(u64 timeout); -void gm20b_pbdma_dump_status(struct gk20a *g, struct gk20a_debug_output *o); +void gm20b_pbdma_dump_status(struct gk20a *g, struct nvgpu_debug_context *o); void gm20b_pbdma_format_gpfifo_entry(struct gk20a *g, struct nvgpu_gpfifo_entry *gpfifo_entry, @@ -57,7 +57,7 @@ u32 gm20b_pbdma_restartable_0_intr_descs(void); void gm20b_pbdma_clear_all_intr(struct gk20a *g, u32 pbdma_id); void gm20b_pbdma_disable_and_clear_all_intr(struct gk20a *g); void gm20b_pbdma_syncpoint_debug_dump(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info); void gm20b_pbdma_setup_hw(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c index 039d1a799..4da1c8b43 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c @@ -303,7 +303,7 @@ u32 gr_gm20b_get_tpc_num(struct gk20a *g, u32 addr) } int gr_gm20b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { struct nvgpu_gr *gr = g->gr; u32 gr_engine_id; diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.h b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.h index 7b934eba3..bb4d13d03 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.h +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.h @@ -51,7 +51,7 @@ void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); bool gr_gm20b_is_tpc_addr(struct gk20a *g, u32 addr); u32 gr_gm20b_get_tpc_num(struct gk20a *g, u32 addr); int gr_gm20b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); int gr_gm20b_update_pc_sampling(struct nvgpu_channel *c, bool enable); void gr_gm20b_init_cyclestats(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c index fe7f2d7ba..d7d779e05 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c @@ -231,7 +231,7 @@ void gr_gp10b_set_circular_buffer_size(struct gk20a *g, u32 data) int gr_gp10b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { struct nvgpu_gr *gr = g->gr; u32 gr_engine_id; diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h b/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h index fcae4a726..287179dff 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h @@ -31,7 +31,7 @@ struct gk20a; struct nvgpu_channel; struct nvgpu_gr_ctx; struct dbg_session_gk20a; -struct gk20a_debug_output; +struct nvgpu_debug_context; #define NVC097_BES_CROP_DEBUG4_CLAMP_FP_BLEND_TO_INF 0x0U #define NVC097_BES_CROP_DEBUG4_CLAMP_FP_BLEND_TO_MAXVAL 0x1U @@ -43,7 +43,7 @@ void gr_gp10b_set_bes_crop_debug4(struct gk20a *g, u32 data); void gr_gp10b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data); void gr_gp10b_set_circular_buffer_size(struct gk20a *g, u32 data); int gr_gp10b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); void gr_gp10b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); int gr_gp10b_pre_process_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, u32 global_esr, u32 warp_esr, diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c index 60b73dcaf..92f9b6cd5 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c @@ -764,7 +764,7 @@ void gr_gv11b_set_circular_buffer_size(struct gk20a *g, u32 data) } static void gr_gv11b_dump_gr_per_sm_regs(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, u32 gpc, u32 tpc, u32 sm, u32 offset) { @@ -800,7 +800,7 @@ static void gr_gv11b_dump_gr_per_sm_regs(struct gk20a *g, } static void gr_gv11b_dump_gr_sm_regs(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { u32 gpc, tpc, sm, sm_per_tpc; u32 gpc_offset, tpc_offset, offset; @@ -849,7 +849,7 @@ static void gr_gv11b_dump_gr_sm_regs(struct gk20a *g, } int gr_gv11b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { struct nvgpu_gr *gr = g->gr; u32 gr_engine_id; diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.h b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.h index b4885481c..beadb68d3 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.h +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.h @@ -27,7 +27,7 @@ struct gk20a; struct nvgpu_warpstate; -struct gk20a_debug_output; +struct nvgpu_debug_context; u32 gr_gv11b_ctxsw_checksum_mismatch_mailbox_val(void); void gr_gv11b_handle_tpc_sm_ecc_exception(struct gk20a *g, @@ -37,7 +37,7 @@ void gr_gv11b_handle_tpc_sm_ecc_exception(struct gk20a *g, void gr_gv11b_set_alpha_circular_buffer_size(struct gk20a *g, u32 data); void gr_gv11b_set_circular_buffer_size(struct gk20a *g, u32 data); int gr_gv11b_dump_gr_status_regs(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); void gr_gv11b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); int gr_gv11b_pre_process_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, u32 global_esr, u32 warp_esr, diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel.h b/drivers/gpu/nvgpu/include/nvgpu/channel.h index e606f8fa5..d195717c9 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/channel.h +++ b/drivers/gpu/nvgpu/include/nvgpu/channel.h @@ -42,7 +42,7 @@ struct nvgpu_channel_sync; struct nvgpu_gpfifo_userdata; struct nvgpu_gr_subctx; struct nvgpu_gr_ctx; -struct gk20a_debug_output; +struct nvgpu_debug_context; /* Flags to be passed to nvgpu_channel_setup_bind() */ #define NVGPU_SETUP_BIND_FLAGS_SUPPORT_VPR BIT32(0) @@ -546,7 +546,7 @@ int nvgpu_channel_set_syncpt(struct nvgpu_channel *ch); struct nvgpu_channel *nvgpu_channel_refch_from_inst_ptr(struct gk20a *g, u64 inst_ptr); void nvgpu_channel_debug_dump_all(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); int nvgpu_channel_deferred_reset_engines(struct gk20a *g, struct nvgpu_channel *ch); diff --git a/drivers/gpu/nvgpu/include/nvgpu/debug.h b/drivers/gpu/nvgpu/include/nvgpu/debug.h index b66d268b6..e0ddb8113 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/debug.h +++ b/drivers/gpu/nvgpu/include/nvgpu/debug.h @@ -1,7 +1,7 @@ /* * GK20A Debug functionality * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -30,7 +30,7 @@ struct gk20a; struct gpu_ops; -struct gk20a_debug_output { +struct nvgpu_debug_context { void (*fn)(void *ctx, const char *str, size_t len); void *ctx; char buf[256]; @@ -40,11 +40,11 @@ struct gk20a_debug_output { extern unsigned int gk20a_debug_trace_cmdbuf; __attribute__((format (printf, 2, 3))) -void gk20a_debug_output(struct gk20a_debug_output *o, +void gk20a_debug_output(struct nvgpu_debug_context *o, const char *fmt, ...); void gk20a_debug_dump(struct gk20a *g); -void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o); +void gk20a_debug_show_dump(struct gk20a *g, struct nvgpu_debug_context *o); void gk20a_gr_debug_dump(struct gk20a *g); void gk20a_init_debug_ops(struct gpu_ops *gops); @@ -52,11 +52,12 @@ void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink); void gk20a_debug_deinit(struct gk20a *g); #else __attribute__((format (printf, 2, 3))) -static inline void gk20a_debug_output(struct gk20a_debug_output *o, +static inline void gk20a_debug_output(struct nvgpu_debug_context *o, const char *fmt, ...) {} static inline void gk20a_debug_dump(struct gk20a *g) {} -static inline void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o) {} +static inline void gk20a_debug_show_dump(struct gk20a *g, + struct nvgpu_debug_context *o) {} static inline void gk20a_gr_debug_dump(struct gk20a *g) {} static inline void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink) {} static inline void gk20a_debug_deinit(struct gk20a *g) {} diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 21f3619b6..e8402c684 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -34,7 +34,7 @@ struct nvgpu_ce_app; struct gk20a_ctxsw_trace; struct nvgpu_mem_alloc_tracker; struct dbg_profiler_object_data; -struct gk20a_debug_output; +struct nvgpu_debug_context; struct nvgpu_clk_pll_debug_data; struct nvgpu_nvhost_dev; struct nvgpu_netlist_vars; @@ -312,7 +312,7 @@ struct gpu_ops { void (*set_pmm_register)(struct gk20a *g, u32 offset, u32 val, u32 num_chiplets, u32 num_perfmons); int (*dump_gr_regs)(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); int (*update_pc_sampling)(struct nvgpu_channel *ch, bool enable); void (*init_sm_dsm_reg_info)(void); @@ -1107,7 +1107,7 @@ struct gpu_ops { u32 *error_notifier); u32 (*get_signature)(struct gk20a *g); void (*dump_status)(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); u32 (*acquire_val)(u64 timeout); u32 (*read_data)(struct gk20a *g, u32 pbdma_id); void (*reset_header)(struct gk20a *g, u32 pbdma_id); @@ -1189,7 +1189,7 @@ struct gpu_ops { bool eng, bool pbdma); int (*set_syncpt)(struct nvgpu_channel *ch); void (*debug_dump)(struct gk20a *g, - struct gk20a_debug_output *o, + struct nvgpu_debug_context *o, struct nvgpu_channel_dump_info *info); } channel; struct { @@ -1236,7 +1236,7 @@ struct gpu_ops { void (*read_engine_status_info) (struct gk20a *g, u32 engine_id, struct nvgpu_engine_status_info *status); void (*dump_engine_status)(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); } engine_status; struct { void (*read_pbdma_status_info) (struct gk20a *g, @@ -1526,7 +1526,7 @@ struct gpu_ops { } mc; struct { void (*show_dump)(struct gk20a *g, - struct gk20a_debug_output *o); + struct nvgpu_debug_context *o); } debug; #ifdef NVGPU_DEBUGGER struct { diff --git a/drivers/gpu/nvgpu/os/linux/debug.c b/drivers/gpu/nvgpu/os/linux/debug.c index 13d28ef1a..6a3fcb58d 100644 --- a/drivers/gpu/nvgpu/os/linux/debug.c +++ b/drivers/gpu/nvgpu/os/linux/debug.c @@ -52,7 +52,7 @@ static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str, seq_write((struct seq_file *)ctx, str, len); } -void gk20a_debug_output(struct gk20a_debug_output *o, const char *fmt, ...) +void gk20a_debug_output(struct nvgpu_debug_context *o, const char *fmt, ...) { va_list args; int len; @@ -63,7 +63,7 @@ void gk20a_debug_output(struct gk20a_debug_output *o, const char *fmt, ...) o->fn(o->ctx, o->buf, len); } -void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o) +void gk20a_debug_show_dump(struct gk20a *g, struct nvgpu_debug_context *o) { nvgpu_channel_debug_dump_all(g, o); g->ops.pbdma.dump_status(g, o); @@ -71,7 +71,7 @@ void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o) } static int gk20a_gr_dump_regs(struct gk20a *g, - struct gk20a_debug_output *o) + struct nvgpu_debug_context *o) { if (g->ops.gr.dump_gr_regs) nvgpu_pg_elpg_protected_call(g, g->ops.gr.dump_gr_regs(g, o)); @@ -81,7 +81,7 @@ static int gk20a_gr_dump_regs(struct gk20a *g, void gk20a_gr_debug_dump(struct gk20a *g) { - struct gk20a_debug_output o = { + struct nvgpu_debug_context o = { .fn = gk20a_debug_write_printk, .ctx = g, }; @@ -93,7 +93,7 @@ static int gk20a_gr_debug_show(struct seq_file *s, void *unused) { struct device *dev = s->private; struct gk20a *g = gk20a_get_platform(dev)->g; - struct gk20a_debug_output o = { + struct nvgpu_debug_context o = { .fn = gk20a_debug_write_to_seqfile, .ctx = s, }; @@ -115,7 +115,7 @@ static int gk20a_gr_debug_show(struct seq_file *s, void *unused) void gk20a_debug_dump(struct gk20a *g) { struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g)); - struct gk20a_debug_output o = { + struct nvgpu_debug_context o = { .fn = gk20a_debug_write_printk, .ctx = g, }; @@ -131,7 +131,7 @@ void gk20a_debug_dump(struct gk20a *g) static int gk20a_debug_show(struct seq_file *s, void *unused) { struct device *dev = s->private; - struct gk20a_debug_output o = { + struct nvgpu_debug_context o = { .fn = gk20a_debug_write_to_seqfile, .ctx = s, };