nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: move fuse definitions to fuse.h

Browse Source 
Move common fuse definition macros to fuse.h. This will allow all
chip specific fuse files to use the common macros.

Jira NVGPU-6081

Change-Id: I85b5250809eef26a40f5b4b9bf6908dfa0d2be1f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2422892
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-10-02 10:13:20 -07:00
committed by Alex Waterman
parent 3aec79d242
commit 78fb67bb0b
10 changed files with 7 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/hal/fuse/fuse_gm20b.h
View File

@@ -25,11 +25,6 @@
#ifndef NVGPU_FUSE_GM20B_H
#define NVGPU_FUSE_GM20B_H
#define GCPLEX_CONFIG_VPR_AUTO_FETCH_DISABLE_MASK BIT32(0)
#define GCPLEX_CONFIG_VPR_ENABLED_MASK BIT32(1)
#define GCPLEX_CONFIG_WPR_ENABLED_MASK BIT32(2)
struct gk20a;
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) || defined(CONFIG_NVGPU_DGPU)

1
drivers/gpu/nvgpu/hal/fuse/fuse_gp10b_fusa.c
View File

@@ -28,7 +28,6 @@
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "fuse_gm20b.h"
#include "fuse_gp10b.h"
#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>

4
drivers/gpu/nvgpu/include/nvgpu/fuse.h
View File

@@ -36,6 +36,10 @@ struct gk20a;
#include "include/nvgpu/nvgpu_next_fuse.h"
#endif
#define GCPLEX_CONFIG_VPR_AUTO_FETCH_DISABLE_MASK BIT32(0)
#define GCPLEX_CONFIG_VPR_ENABLED_MASK BIT32(1)
#define GCPLEX_CONFIG_WPR_ENABLED_MASK BIT32(2)
#ifdef CONFIG_NVGPU_NON_FUSA
int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g, int *id);
int nvgpu_tegra_fuse_read_reserved_calib(struct gk20a *g, u32 *val);

2
drivers/gpu/nvgpu/os/posix/fuse.c
View File

@@ -26,8 +26,6 @@
#include <nvgpu/posix/io.h>
#include <nvgpu/posix/soc_fuse.h>
#include "hal/fuse/fuse_gm20b.h"
#ifdef CONFIG_NVGPU_NON_FUSA
int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g, int *id)
{

3
userspace/units/acr/nvgpu-acr.c
View File

@@ -34,6 +34,7 @@
#include <nvgpu/lock.h>
#include <nvgpu/firmware.h>
#include <nvgpu/netlist.h>
#include <nvgpu/fuse.h>
#include <nvgpu/gr/gr.h>
@@ -55,8 +56,6 @@
#include <nvgpu/hw/gv11b/hw_falcon_gv11b.h>
#include <nvgpu/hw/gv11b/hw_pwr_gv11b.h>
#include "hal/fuse/fuse_gm20b.h"
#include "nvgpu-acr.h"
#include "../falcon/falcon_utf.h"
#include "../gr/nvgpu-gr-gv11b.h"

3
userspace/units/fifo/nvgpu-fifo-gv11b.c
View File

@@ -23,12 +23,11 @@
#include <unit/module.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/fuse.h>
#include <nvgpu/posix/io.h>
#include <nvgpu/posix/soc_fuse.h>
#include "hal/fuse/fuse_gm20b.h"
#include "nvgpu-fifo-gv11b.h"
/*

1
userspace/units/fuse/nvgpu-fuse-gm20b.c
View File

@@ -27,7 +27,6 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/fuse.h>
#include <nvgpu/hal_init.h>
#include "hal/fuse/fuse_gm20b.h"
#include "nvgpu-fuse-priv.h"
#include "nvgpu-fuse-gm20b.h"

1
userspace/units/fuse/nvgpu-fuse-gp10b.c
View File

@@ -25,7 +25,6 @@
#include <nvgpu/posix/io.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/fuse.h>
#include "hal/fuse/fuse_gm20b.h"
#include "nvgpu-fuse-priv.h"
#include "nvgpu-fuse-gp10b.h"

2
userspace/units/fuse/nvgpu-fuse-tu104.c
View File

@@ -29,8 +29,6 @@
#include <nvgpu/hal_init.h>
#include <nvgpu/pmu/clk/clk.h>
#include "hal/fuse/fuse_gm20b.h"
#include "nvgpu-fuse-priv.h"
#include "nvgpu-fuse-tu104.h"

2
userspace/units/pmu/nvgpu-pmu.c
View File

@@ -29,6 +29,7 @@
#include <nvgpu/falcon.h>
#include <nvgpu/hal_init.h>
#include <nvgpu/netlist.h>
#include <nvgpu/fuse.h>
#include <nvgpu/gr/gr.h>
@@ -42,7 +43,6 @@
#include <nvgpu/hw/gv11b/hw_pwr_gv11b.h>
#include <nvgpu/hw/gv11b/hw_pwr_gv11b.h>
#include "hal/fuse/fuse_gm20b.h"
#include "hal/pmu/pmu_gk20a.h"
#include "../falcon/falcon_utf.h"