gpu: nvgpu: make debugger register access ELPG protected

Some of the APIs that access debugger register are not protected
from ELPG. This might trigger PRI access timeouts for corresponding
registers if GR engine is power gated.

Add nvgpu_pg_elpg_protected_call() to protect against ELPG.

Bug 2820066

Change-Id: I467ea28aaea1c0e36c2d6aabce6a2daea6ee9911
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306383
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-03-03 15:58:42 +05:30
committed by Alex Waterman
parent 31b8ecbcee
commit 7a4ecc8966

View File

@@ -720,7 +720,8 @@ static int nvgpu_gpu_ioctl_trigger_suspend(struct gk20a *g)
return err;
nvgpu_mutex_acquire(&g->dbg_sessions_lock);
err = g->ops.gr.trigger_suspend(g);
err = nvgpu_pg_elpg_protected_call(g,
g->ops.gr.trigger_suspend(g));
nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_idle(g);
@@ -757,7 +758,8 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
}
nvgpu_mutex_acquire(&g->dbg_sessions_lock);
g->ops.gr.wait_for_pause(g, w_state);
(void)nvgpu_pg_elpg_protected_call(g,
g->ops.gr.wait_for_pause(g, w_state));
for (sm_id = 0; sm_id < no_of_sm; sm_id++) {
ioctl_w_state[sm_id].valid_warps[0] =
@@ -800,7 +802,8 @@ static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g)
return err;
nvgpu_mutex_acquire(&g->dbg_sessions_lock);
err = g->ops.gr.resume_from_pause(g);
err = nvgpu_pg_elpg_protected_call(g,
g->ops.gr.resume_from_pause(g));
nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_idle(g);
@@ -816,7 +819,8 @@ static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g)
if (err)
return err;
err = g->ops.gr.clear_sm_errors(g);
err = nvgpu_pg_elpg_protected_call(g,
g->ops.gr.clear_sm_errors(g));
gk20a_idle(g);