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gpu: nvgpu: enable irqs before nvgpu_finalize_poweron

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IRQs were not enabled before nvgpu_finalize_poweron, so debugging early
init issues such as MMU fault, invalid PRIV ring or bus access etc.
triggered during nvgpu power-on was cumbersome. Hence, Enable the
IRQs before nvgpu_finalize_poweron is called.

In HUB (MMU fault) ISR, MMU fault handling is only limited to snapped
in priv reg in case of fault during nvgpu power-on.

In HUB (MMU fault) ISR, access to fault buffers is synchronized as
nvgpu driver reads the fault buffer registers before proceeding
with fault handling. However, additional MMU fault handling
needs to be synchronized with GR/FIFO/quiesce/recovery setup
through nvgpu power-on state.

JIRA NVGPU-1592

Change-Id: I8a5f2fcd79cb7ad8e215359e7a9fad50bfd46d67
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203861
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-09-23 15:47:37 +05:30
committed by Alex Waterman
parent 6c3c360462
commit 7a62265dde
2 changed files with 23 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/nvgpu/os/linux/module.c
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@@ -454,6 +454,12 @@ int gk20a_pm_finalize_poweron(struct device *dev)
}
}
err = nvgpu_enable_irqs(g);
if (err) {
nvgpu_err(g, "failed to enable irqs %d", err);
goto done;
}
err = nvgpu_finalize_poweron(g);
if (err)
goto done;
@@ -489,12 +495,6 @@ int gk20a_pm_finalize_poweron(struct device *dev)
trace_gk20a_finalize_poweron_done(dev_name(dev));
#endif
err = nvgpu_enable_irqs(g);
if (err) {
nvgpu_err(g, "failed to enable irqs %d", err);
goto done;
}
gk20a_scale_resume(dev_from_gk20a(g));
#ifdef CONFIG_NVGPU_SUPPORT_CDE
@@ -513,6 +513,10 @@ int gk20a_pm_finalize_poweron(struct device *dev)
nvgpu_set_power_state(g, NVGPU_STATE_POWERED_ON);
done:
if (err != 0) {
nvgpu_disable_irqs(g);
}
nvgpu_mutex_release(&g->power_lock);
return err;
}