From 7aa9e90bfcb80e186c80af9bd51bd9960e4241c5 Mon Sep 17 00:00:00 2001 From: Vedashree Vidwans Date: Thu, 20 Feb 2020 16:56:17 -0800 Subject: [PATCH] gpu: nvgpu: update gops.cg Update gops.cg to include following runlist level cg ops: - blcg_runlist_load_gating_prod - slcg_runlist_load_gating_prod Jira NVGPU-5048 Change-Id: Ia2a3f887d5c2fd6f1dd35d606afd19d117468c2c Signed-off-by: Antony Clince Alex Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2300448 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Seema Khowala Reviewed-by: Deepak Nibade Reviewed-by: Alex Waterman Reviewed-by: Seshendra Gadagottu Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- .../gpu/nvgpu/common/power_features/cg/cg.c | 22 ++++++++++++++++++- drivers/gpu/nvgpu/include/nvgpu/gops_cg.h | 5 ++++- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/common/power_features/cg/cg.c b/drivers/gpu/nvgpu/common/power_features/cg/cg.c index f70ac2fba..ebdf5fe48 100644 --- a/drivers/gpu/nvgpu/common/power_features/cg/cg.c +++ b/drivers/gpu/nvgpu/common/power_features/cg/cg.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -113,6 +113,11 @@ void nvgpu_cg_blcg_fifo_load_enable(struct gk20a *g) if (g->ops.cg.blcg_fifo_load_gating_prod != NULL) { g->ops.cg.blcg_fifo_load_gating_prod(g, true); } +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) + if (g->ops.cg.blcg_runlist_load_gating_prod != NULL) { + g->ops.cg.blcg_runlist_load_gating_prod(g, true); + } +#endif done: nvgpu_mutex_release(&g->cg_pg_lock); } @@ -206,6 +211,11 @@ void nvgpu_cg_slcg_fifo_load_enable(struct gk20a *g) if (g->ops.cg.slcg_fifo_load_gating_prod != NULL) { g->ops.cg.slcg_fifo_load_gating_prod(g, true); } +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) + if (g->ops.cg.slcg_runlist_load_gating_prod != NULL) { + g->ops.cg.slcg_runlist_load_gating_prod(g, true); + } +#endif done: nvgpu_mutex_release(&g->cg_pg_lock); } @@ -479,6 +489,11 @@ void nvgpu_cg_blcg_set_blcg_enabled(struct gk20a *g, bool enable) if (g->ops.cg.blcg_gr_load_gating_prod != NULL) { g->ops.cg.blcg_gr_load_gating_prod(g, enable); } +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) + if (g->ops.cg.blcg_runlist_load_gating_prod != NULL) { + g->ops.cg.blcg_runlist_load_gating_prod(g, enable); + } +#endif if (g->ops.cg.blcg_ltc_load_gating_prod != NULL) { g->ops.cg.blcg_ltc_load_gating_prod(g, enable); } @@ -535,6 +550,11 @@ void nvgpu_cg_slcg_set_slcg_enabled(struct gk20a *g, bool enable) if (g->ops.cg.slcg_fifo_load_gating_prod != NULL) { g->ops.cg.slcg_fifo_load_gating_prod(g, enable); } +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) + if (g->ops.cg.slcg_runlist_load_gating_prod != NULL) { + g->ops.cg.slcg_runlist_load_gating_prod(g, enable); + } +#endif if (g->ops.cg.slcg_gr_load_gating_prod != NULL) { g->ops.cg.slcg_gr_load_gating_prod(g, enable); } diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops_cg.h b/drivers/gpu/nvgpu/include/nvgpu/gops_cg.h index 70f458a98..d63e6294a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops_cg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops_cg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -60,6 +60,9 @@ struct gops_cg { void (*blcg_pmu_load_gating_prod)(struct gk20a *g, bool prod); void (*blcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); void (*blcg_hshub_load_gating_prod)(struct gk20a *g, bool prod); +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) +#include "include/nvgpu/nvgpu_next_gops_cg.h" +#endif /** @endcond DOXYGEN_SHOULD_SKIP_THIS */ };