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gpu: nvgpu: add new device types

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This patch adds macros for new device types based on the device
information table. Specifically, it adds the device type IDs for the
following engines:

- SEC
- NVENC
- NVDEC
- NVJPG
- OFA

Further, the max dev types has been updated as 57 in the device info
table. To support his, the corresponding macro has been updated as 58.

JIRA NVGPU-9501

Change-Id: I23f17c91da8a6063457c27763a62b1a08beeed0d
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2846203
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2023-01-19 09:57:31 +00:00
committed by mobile promotions
parent afb971b66e
commit 7ad50fee7c
2 changed files with 138 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

52
drivers/gpu/nvgpu/common/device.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -55,6 +55,21 @@ static inline const char *nvgpu_device_type_to_str(const struct nvgpu_device *de
case NVGPU_DEVTYPE_LCE:
str = "LCE";
break;
case NVGPU_DEVTYPE_SEC:
str = "SEC";
break;
case NVGPU_DEVTYPE_NVENC:
str = "NVENC";
break;
case NVGPU_DEVTYPE_NVDEC:
str = "NVDEC";
break;
case NVGPU_DEVTYPE_NVJPG:
str = "NVJPG";
break;
case NVGPU_DEVTYPE_NVOFA:
str = "NVOFA";
break;
default:
break;
}
@@ -337,3 +352,38 @@ bool nvgpu_device_is_graphics(struct gk20a *g, const struct nvgpu_device *dev)
return dev->type == NVGPU_DEVTYPE_GRAPHICS;
}
bool nvgpu_device_is_sec(struct gk20a *g, const struct nvgpu_device *dev)
{
(void)g;
return dev->type == NVGPU_DEVTYPE_SEC;
}
bool nvgpu_device_is_nvenc(struct gk20a *g, const struct nvgpu_device *dev)
{
(void)g;
return dev->type == NVGPU_DEVTYPE_NVENC;
}
bool nvgpu_device_is_nvdec(struct gk20a *g, const struct nvgpu_device *dev)
{
(void)g;
return dev->type == NVGPU_DEVTYPE_NVDEC;
}
bool nvgpu_device_is_nvjpg(struct gk20a *g, const struct nvgpu_device *dev)
{
(void)g;
return dev->type == NVGPU_DEVTYPE_NVJPG;
}
bool nvgpu_device_is_nvofa(struct gk20a *g, const struct nvgpu_device *dev)
{
(void)g;
return dev->type == NVGPU_DEVTYPE_NVOFA;
}

89
drivers/gpu/nvgpu/include/nvgpu/device.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -72,6 +72,27 @@ struct gk20a;
*/
#define NVGPU_DEVTYPE_COPY2 3U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
* Device type for SEC engine instances.
*/
#define NVGPU_DEVTYPE_SEC 13U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
* Device type for NVENC engine instances.
*/
#define NVGPU_DEVTYPE_NVENC 14U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
* Device type for NVDEC engine instances.
*/
#define NVGPU_DEVTYPE_NVDEC 16U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
@@ -86,7 +107,21 @@ struct gk20a;
*/
#define NVGPU_DEVTYPE_LCE 19U
#define NVGPU_MAX_DEVTYPE 24U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
* Device type for NVJPG engine instances.
*/
#define NVGPU_DEVTYPE_NVJPG 21U
/**
* @ingroup NVGPU_TOP_DEVICE_INFO_DEFINES
*
* Device type for NVOFA engine instances.
*/
#define NVGPU_DEVTYPE_NVOFA 22U
#define NVGPU_MAX_DEVTYPE 58U
#define NVGPU_DEVICE_TOKEN_INIT 0U
@@ -287,6 +322,56 @@ bool nvgpu_device_is_ce(struct gk20a *g, const struct nvgpu_device *dev);
*/
bool nvgpu_device_is_graphics(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Return true if dev is a security controller engine device.
*
* @param g [in] The GPU.
* @param dev [in] A device.
*
* @return true if \a dev matches the security controller device type.
*/
bool nvgpu_device_is_sec(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Return true if dev is a NVENC engine device.
*
* @param g [in] The GPU.
* @param dev [in] A device.
*
* @return true if \a dev matches the NVENC device type.
*/
bool nvgpu_device_is_nvenc(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Return true if dev is a NVDEC engine device.
*
* @param g [in] The GPU.
* @param dev [in] A device.
*
* @return true if \a dev matches the NVDEC device type.
*/
bool nvgpu_device_is_nvdec(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Return true if dev is a NVJPG engine device.
*
* @param g [in] The GPU.
* @param dev [in] A device.
*
* @return true if \a dev matches the NVJPG device type.
*/
bool nvgpu_device_is_nvjpg(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Return true if dev is a NVOFA engine device.
*
* @param g [in] The GPU.
* @param dev [in] A device.
*
* @return true if \a dev matches the NVOFA device type.
*/
bool nvgpu_device_is_nvofa(struct gk20a *g, const struct nvgpu_device *dev);
/**
* @brief Get all the copy engine pointers for this chip.
*