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nvgpu: add -Wshadow compile flag to posix build

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hvrtos/hypervisor added default cflags -Wshadow which is required by
AUTOSAR M3-4-1. The patch adds the flag to posix build to make sure the
code pass build on hvrtos.

Jira GVSCI-9976

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: If43281689a2aea95e4a768f59014f787f2e9ee23
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2728216
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Richard Zhao
2022-06-12 21:00:15 -07:00
committed by mobile promotions
parent 9890a185e0
commit 7af53dab3d
4 changed files with 19 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/hal/clk/clk_gm20b.c
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@@ -1532,7 +1532,7 @@ void gm20b_suspend_clk_support(struct gk20a *g)
int gm20b_clk_get_voltage(struct clk_gk20a *clk, u64 *val)
{
struct gk20a *g = clk->g;
struct pll_parms *gpc_pll_params = gm20b_get_gpc_pll_parms();
struct pll_parms *pll_params = gm20b_get_gpc_pll_parms();
u32 det_out;
int err;
@@ -1549,8 +1549,8 @@ int gm20b_clk_get_voltage(struct clk_gk20a *clk, u64 *val)
det_out = gk20a_readl(g, trim_sys_gpcpll_cfg3_r());
det_out = trim_sys_gpcpll_cfg3_dfs_testout_v(det_out);
*val = div64_u64((u64)det_out * (u64)gpc_pll_params->uvdet_slope +
(u64)gpc_pll_params->uvdet_offs, 1000ULL);
*val = div64_u64((u64)det_out * (u64)pll_params->uvdet_slope +
(u64)pll_params->uvdet_offs, 1000ULL);
nvgpu_mutex_release(&g->clk.clk_mutex);

14
drivers/gpu/nvgpu/include/nvgpu/power_features/pg.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -31,16 +31,16 @@ struct gk20a;
#ifdef CONFIG_NVGPU_POWER_PG
#define nvgpu_pg_elpg_protected_call(g, func) \
({ \
int err = 0; \
err = nvgpu_pg_elpg_disable(g);\
if (err != 0) {\
int rt = 0; \
rt = nvgpu_pg_elpg_disable(g);\
if (rt != 0) {\
(void)nvgpu_pg_elpg_enable(g);\
}\
if (err == 0) { \
err = (func); \
if (rt == 0) { \
rt = (func); \
(void)nvgpu_pg_elpg_enable(g);\
} \
err; \
rt; \
})
#define nvgpu_pg_elpg_ms_protected_call(g, func) \

16
drivers/gpu/nvgpu/include/nvgpu/static_analysis.h
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@@ -152,15 +152,15 @@ static inline s64 nvgpu_safe_add_s64(s64 sl_a, s64 sl_b)
#define NVGPU_SAFE_ADD_UNSIGNED(a, b) \
({ \
typeof(a) _a = (a), _b = (typeof(a))(b), ret = 0U; \
typeof(a) _a = (a), _b = (typeof(a))(b), rt = 0U; \
typeof(_a) max = (typeof(_a))(-1LL); \
\
if ((max - _a) < _b) { \
BUG(); \
} else { \
ret = _a + _b; \
rt = _a + _b; \
} \
ret; \
rt; \
})
/**
@@ -327,15 +327,15 @@ static inline u64 nvgpu_safe_sub_u64(u64 ul_a, u64 ul_b)
}
}
#define NVGPU_SAFE_SUB_UNSIGNED(a, b) \
#define NVGPU_SAFE_SUB_UNSIGNED(x, y) \
({ \
typeof(a) _a = (a), _b = (typeof(a))(b), ret = 0U; \
if (_a < _b) { \
typeof(x) _x = (x), _y = (typeof(x))(y), rt = 0U; \
if (_x < _y) { \
BUG(); \
} else { \
ret = (typeof(_a))(_a - _b); \
rt = (typeof(_x))(_x - _y); \
} \
ret; \
rt; \
})
/**

1
libs/Makefile.common.tmk
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@@ -70,6 +70,7 @@ _NV_TOOLCHAIN_CFLAGS += \
-Wmissing-braces -Wpointer-arith -Wundef \
-Wconversion -Wsign-conversion \
-Wformat-security \
-Wshadow \
-Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough
endif