gpu: nvgpu: isolate common & hal falcon_copy_from|to_dmem|imem functions

nvgpu_falcon_copy_from|to_dmem|imem should validate copy parameters. And
gk20a_falcon_copy_from|to_dmem|imem is supposed to be hal API that will
copy the data.

JIRA NVGPU-1459

Change-Id: I2648721f42cffd30d29058818af26d4ad47c7277
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2015592
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-02-06 16:08:39 +05:30
committed by mobile promotions
parent 11fa89d618
commit 7b51c6befc
2 changed files with 92 additions and 73 deletions

View File

@@ -281,6 +281,45 @@ int nvgpu_falcon_copy_to_emem(struct nvgpu_falcon *flcn,
return status; return status;
} }
static int falcon_memcpy_params_check(struct nvgpu_falcon *flcn,
u32 offset, u32 size, enum falcon_mem_type mem_type)
{
struct nvgpu_falcon_ops *flcn_ops = &flcn->flcn_ops;
struct gk20a *g = flcn->g;
u32 mem_size = 0;
int ret = -EINVAL;
if (size == 0U) {
nvgpu_err(g, "size is zero");
goto exit;
}
if ((offset & 0x3U) != 0U) {
nvgpu_err(g, "offset (0x%08x) not 4-byte aligned", offset);
goto exit;
}
if (flcn_ops->get_mem_size == NULL) {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
goto exit;
}
mem_size = flcn_ops->get_mem_size(flcn, mem_type);
if (!(offset <= mem_size && (offset + size) <= mem_size)) {
nvgpu_err(g, "flcn-id 0x%x, copy overflow ",
flcn->flcn_id);
nvgpu_err(g, "total size 0x%x, offset 0x%x, copy size 0x%x",
mem_size, offset, size);
goto exit;
}
ret = 0;
exit:
return ret;
}
int nvgpu_falcon_copy_from_dmem(struct nvgpu_falcon *flcn, int nvgpu_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
u32 src, u8 *dst, u32 size, u8 port) u32 src, u8 *dst, u32 size, u8 port)
{ {
@@ -288,20 +327,27 @@ int nvgpu_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
int status = -EINVAL; int status = -EINVAL;
if (flcn == NULL) { if (flcn == NULL) {
return -EINVAL; goto exit;
} }
flcn_ops = &flcn->flcn_ops; flcn_ops = &flcn->flcn_ops;
if (flcn_ops->copy_from_dmem != NULL) { if (flcn_ops->copy_from_dmem == NULL) {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
goto exit;
}
if (falcon_memcpy_params_check(flcn, src, size, MEM_DMEM) != 0) {
nvgpu_err(flcn->g, "incorrect parameters");
goto exit;
}
nvgpu_mutex_acquire(&flcn->copy_lock); nvgpu_mutex_acquire(&flcn->copy_lock);
status = flcn_ops->copy_from_dmem(flcn, src, dst, size, port); status = flcn_ops->copy_from_dmem(flcn, src, dst, size, port);
nvgpu_mutex_release(&flcn->copy_lock); nvgpu_mutex_release(&flcn->copy_lock);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
exit:
return status; return status;
} }
@@ -312,20 +358,27 @@ int nvgpu_falcon_copy_to_dmem(struct nvgpu_falcon *flcn,
int status = -EINVAL; int status = -EINVAL;
if (flcn == NULL) { if (flcn == NULL) {
return -EINVAL; goto exit;
} }
flcn_ops = &flcn->flcn_ops; flcn_ops = &flcn->flcn_ops;
if (flcn_ops->copy_to_dmem != NULL) { if (flcn_ops->copy_to_dmem == NULL) {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
goto exit;
}
if (falcon_memcpy_params_check(flcn, dst, size, MEM_DMEM) != 0) {
nvgpu_err(flcn->g, "incorrect parameters");
goto exit;
}
nvgpu_mutex_acquire(&flcn->copy_lock); nvgpu_mutex_acquire(&flcn->copy_lock);
status = flcn_ops->copy_to_dmem(flcn, dst, src, size, port); status = flcn_ops->copy_to_dmem(flcn, dst, src, size, port);
nvgpu_mutex_release(&flcn->copy_lock); nvgpu_mutex_release(&flcn->copy_lock);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
exit:
return status; return status;
} }
@@ -336,20 +389,27 @@ int nvgpu_falcon_copy_from_imem(struct nvgpu_falcon *flcn,
int status = -EINVAL; int status = -EINVAL;
if (flcn == NULL) { if (flcn == NULL) {
return -EINVAL; goto exit;
} }
flcn_ops = &flcn->flcn_ops; flcn_ops = &flcn->flcn_ops;
if (flcn_ops->copy_from_imem != NULL) { if (flcn_ops->copy_from_imem == NULL) {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
goto exit;
}
if (falcon_memcpy_params_check(flcn, src, size, MEM_IMEM) != 0) {
nvgpu_err(flcn->g, "incorrect parameters");
goto exit;
}
nvgpu_mutex_acquire(&flcn->copy_lock); nvgpu_mutex_acquire(&flcn->copy_lock);
status = flcn_ops->copy_from_imem(flcn, src, dst, size, port); status = flcn_ops->copy_from_imem(flcn, src, dst, size, port);
nvgpu_mutex_release(&flcn->copy_lock); nvgpu_mutex_release(&flcn->copy_lock);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
exit:
return status; return status;
} }
@@ -360,21 +420,28 @@ int nvgpu_falcon_copy_to_imem(struct nvgpu_falcon *flcn,
int status = -EINVAL; int status = -EINVAL;
if (flcn == NULL) { if (flcn == NULL) {
return -EINVAL; goto exit;
} }
flcn_ops = &flcn->flcn_ops; flcn_ops = &flcn->flcn_ops;
if (flcn_ops->copy_to_imem != NULL) { if (flcn_ops->copy_to_imem == NULL) {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
goto exit;
}
if (falcon_memcpy_params_check(flcn, dst, size, MEM_IMEM) != 0) {
nvgpu_err(flcn->g, "incorrect parameters");
goto exit;
}
nvgpu_mutex_acquire(&flcn->copy_lock); nvgpu_mutex_acquire(&flcn->copy_lock);
status = flcn_ops->copy_to_imem(flcn, dst, src, size, port, status = flcn_ops->copy_to_imem(flcn, dst, src, size, port,
sec, tag); sec, tag);
nvgpu_mutex_release(&flcn->copy_lock); nvgpu_mutex_release(&flcn->copy_lock);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
exit:
return status; return status;
} }

View File

@@ -148,34 +148,6 @@ static u32 gk20a_falcon_get_mem_size(struct nvgpu_falcon *flcn,
return mem_size; return mem_size;
} }
static int falcon_mem_overflow_check(struct nvgpu_falcon *flcn,
u32 offset, u32 size, enum falcon_mem_type mem_type)
{
struct gk20a *g = flcn->g;
u32 mem_size = 0;
if (size == 0U) {
nvgpu_err(g, "size is zero");
return -EINVAL;
}
if ((offset & 0x3U) != 0U) {
nvgpu_err(g, "offset (0x%08x) not 4-byte aligned", offset);
return -EINVAL;
}
mem_size = gk20a_falcon_get_mem_size(flcn, mem_type);
if (!(offset <= mem_size && (offset + size) <= mem_size)) {
nvgpu_err(g, "flcn-id 0x%x, copy overflow ",
flcn->flcn_id);
nvgpu_err(g, "total size 0x%x, offset 0x%x, copy size 0x%x",
mem_size, offset, size);
return -EINVAL;
}
return 0;
}
static int gk20a_falcon_copy_from_dmem(struct nvgpu_falcon *flcn, static int gk20a_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
u32 src, u8 *dst, u32 size, u8 port) u32 src, u8 *dst, u32 size, u8 port)
{ {
@@ -187,11 +159,6 @@ static int gk20a_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
nvgpu_log_fn(g, " src dmem offset - %x, size - %x", src, size); nvgpu_log_fn(g, " src dmem offset - %x, size - %x", src, size);
if (falcon_mem_overflow_check(flcn, src, size, MEM_DMEM) != 0) {
nvgpu_err(g, "incorrect parameters");
return -EINVAL;
}
words = size >> 2; words = size >> 2;
bytes = size & 0x3U; bytes = size & 0x3U;
@@ -229,11 +196,6 @@ static int gk20a_falcon_copy_to_dmem(struct nvgpu_falcon *flcn,
nvgpu_log_fn(g, "dest dmem offset - %x, size - %x", dst, size); nvgpu_log_fn(g, "dest dmem offset - %x, size - %x", dst, size);
if (falcon_mem_overflow_check(flcn, dst, size, MEM_DMEM) != 0) {
nvgpu_err(g, "incorrect parameters");
return -EINVAL;
}
words = size >> 2; words = size >> 2;
bytes = size & 0x3U; bytes = size & 0x3U;
@@ -283,11 +245,6 @@ static int gk20a_falcon_copy_from_imem(struct nvgpu_falcon *flcn, u32 src,
nvgpu_log_info(g, "download %d bytes from 0x%x", size, src); nvgpu_log_info(g, "download %d bytes from 0x%x", size, src);
if (falcon_mem_overflow_check(flcn, src, size, MEM_IMEM) != 0) {
nvgpu_err(g, "incorrect parameters");
return -EINVAL;
}
words = size >> 2; words = size >> 2;
bytes = size & 0x3U; bytes = size & 0x3U;
blk = src >> 8; blk = src >> 8;
@@ -327,11 +284,6 @@ static int gk20a_falcon_copy_to_imem(struct nvgpu_falcon *flcn, u32 dst,
nvgpu_log_info(g, "upload %d bytes to 0x%x", size, dst); nvgpu_log_info(g, "upload %d bytes to 0x%x", size, dst);
if (falcon_mem_overflow_check(flcn, dst, size, MEM_IMEM) != 0) {
nvgpu_err(g, "incorrect parameters");
return -EINVAL;
}
words = size >> 2; words = size >> 2;
blk = dst >> 8; blk = dst >> 8;