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gpu: nvgpu: update the PMA uapi to have channel id

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This patch augments the PMA uapi to have the PMA channel
id:
- PMA_STREAM_ALLOC returns a pma channel id to the client.
- PMA_STREAM_FREE and PMA_STREAM_UPDATE_GET_PUT take a
  pma channel id.

Bug 3944943

Change-Id: I22adfe13d2b693bb952f6c456f23534e86a63ef3
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2915485
Reviewed-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Martin Radev
2023-06-05 09:59:54 +03:00
committed by mobile promotions
parent a55491015c
commit 7d02506275
2 changed files with 17 additions and 5 deletions
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7
drivers/gpu/nvgpu/os/linux/ioctl_prof.c
View File

@@ -470,6 +470,7 @@ static int nvgpu_prof_ioctl_alloc_pma_stream(struct nvgpu_profiler_object_priv *
prof->pma_bytes_available_buffer_va); prof->pma_bytes_available_buffer_va);
args->pma_buffer_va = pma_buffer_offset; args->pma_buffer_va = pma_buffer_offset;
args->pma_channel_id = 0u;
/* Decrement pma_dmabuf ref count as we already mapped it. */ /* Decrement pma_dmabuf ref count as we already mapped it. */
dma_buf_put(pma_dmabuf); dma_buf_put(pma_dmabuf);
@@ -515,7 +516,8 @@ static void nvgpu_prof_free_pma_stream_priv_data(struct nvgpu_profiler_object_pr
prof->pma_bytes_available_buffer_cpuva = NULL; prof->pma_bytes_available_buffer_cpuva = NULL;
} }
static int nvgpu_prof_ioctl_free_pma_stream(struct nvgpu_profiler_object_priv *priv) static int nvgpu_prof_ioctl_free_pma_stream(struct nvgpu_profiler_object_priv *priv,
struct nvgpu_profiler_free_pma_stream_args *args)
{ {
struct nvgpu_profiler_object *prof = priv->prof; struct nvgpu_profiler_object *prof = priv->prof;
struct gk20a *g = prof->g; struct gk20a *g = prof->g;
@@ -942,7 +944,8 @@ long nvgpu_prof_fops_ioctl(struct file *filp, unsigned int cmd,
break; break;
case NVGPU_PROFILER_IOCTL_FREE_PMA_STREAM: case NVGPU_PROFILER_IOCTL_FREE_PMA_STREAM:
err = nvgpu_prof_ioctl_free_pma_stream(prof_priv); err = nvgpu_prof_ioctl_free_pma_stream(prof_priv,
(struct nvgpu_profiler_free_pma_stream_args *)buf);
break; break;
case NVGPU_PROFILER_IOCTL_EXEC_REG_OPS: case NVGPU_PROFILER_IOCTL_EXEC_REG_OPS:

15
include/uapi/linux/nvgpu.h
View File

@@ -832,7 +832,14 @@ struct nvgpu_profiler_alloc_pma_stream_args {
#define NVGPU_PROFILER_ALLOC_PMA_STREAM_ARG_FLAG_CTXSW (1 << 0) #define NVGPU_PROFILER_ALLOC_PMA_STREAM_ARG_FLAG_CTXSW (1 << 0)
__u32 flags; __u32 flags;
__u32 reserved[3]; __u32 pma_channel_id; /* out: PMA hardware stream id */
__u32 reserved[2];
};
struct nvgpu_profiler_free_pma_stream_args {
__u32 pma_channel_id; /* in: PMA hardware stream id */
__u32 reserved[2];
}; };
struct nvgpu_profiler_pma_stream_update_get_put_args { struct nvgpu_profiler_pma_stream_update_get_put_args {
@@ -851,7 +858,9 @@ struct nvgpu_profiler_pma_stream_update_get_put_args {
#define NVGPU_PROFILER_PMA_STREAM_UPDATE_GET_PUT_ARG_FLAG_OVERFLOW_TRIGGERED (1 << 3) #define NVGPU_PROFILER_PMA_STREAM_UPDATE_GET_PUT_ARG_FLAG_OVERFLOW_TRIGGERED (1 << 3)
__u32 flags; __u32 flags;
__u32 reserved[3]; __u32 pma_channel_id; /* in: PMA channel index */
__u32 reserved[2];
}; };
/* /*
@@ -955,7 +964,7 @@ struct nvgpu_profiler_vab_flush_state_args {
#define NVGPU_PROFILER_IOCTL_ALLOC_PMA_STREAM \ #define NVGPU_PROFILER_IOCTL_ALLOC_PMA_STREAM \
_IOWR(NVGPU_PROFILER_IOCTL_MAGIC, 4, struct nvgpu_profiler_alloc_pma_stream_args) _IOWR(NVGPU_PROFILER_IOCTL_MAGIC, 4, struct nvgpu_profiler_alloc_pma_stream_args)
#define NVGPU_PROFILER_IOCTL_FREE_PMA_STREAM \ #define NVGPU_PROFILER_IOCTL_FREE_PMA_STREAM \
_IO(NVGPU_PROFILER_IOCTL_MAGIC, 5) _IOW(NVGPU_PROFILER_IOCTL_MAGIC, 5, struct nvgpu_profiler_free_pma_stream_args)
#define NVGPU_PROFILER_IOCTL_BIND_PM_RESOURCES \ #define NVGPU_PROFILER_IOCTL_BIND_PM_RESOURCES \
_IO(NVGPU_PROFILER_IOCTL_MAGIC, 6) _IO(NVGPU_PROFILER_IOCTL_MAGIC, 6)
#define NVGPU_PROFILER_IOCTL_UNBIND_PM_RESOURCES \ #define NVGPU_PROFILER_IOCTL_UNBIND_PM_RESOURCES \