gpu: nvgpu: vgpu: add channel interleave support

Update vgpu back-end to send channel interleave request
to server.

JIRA VFND-1313
Bug 1729664

Change-Id: I2433aef485135ae9222dec238e25aedc19257744
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1028976
(cherry picked from commit df3c5dc410839d126cc0574064d23e58102689b8)
Reviewed-on: http://git-master/r/1026049
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Aingara Paramakuru
2016-03-04 10:15:08 -05:00
committed by Terje Bergstrom
parent 6e946ad3a3
commit 7d45a7361d
2 changed files with 40 additions and 3 deletions

View File

@@ -1,7 +1,7 @@
/*
* Tegra GPU Virtualization Interfaces to Server
*
* Copyright (c) 2014-2015, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2014-2016, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -74,7 +74,8 @@ enum {
TEGRA_VGPU_CMD_SET_MMU_DEBUG_MODE,
TEGRA_VGPU_CMD_SET_SM_DEBUG_MODE,
TEGRA_VGPU_CMD_REG_OPS,
TEGRA_VGPU_CMD_CHANNEL_SET_PRIORITY
TEGRA_VGPU_CMD_CHANNEL_SET_PRIORITY,
TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE
};
struct tegra_vgpu_connect_params {
@@ -298,6 +299,12 @@ struct tegra_vgpu_channel_priority_params {
u32 priority;
};
/* level follows nvgpu.h definitions */
struct tegra_vgpu_channel_runlist_interleave_params {
u64 handle;
u32 level;
};
struct tegra_vgpu_cmd_msg {
u32 cmd;
int ret;
@@ -326,6 +333,7 @@ struct tegra_vgpu_cmd_msg {
struct tegra_vgpu_sm_debug_mode sm_debug_mode;
struct tegra_vgpu_reg_ops_params reg_ops;
struct tegra_vgpu_channel_priority_params channel_priority;
struct tegra_vgpu_channel_runlist_interleave_params channel_interleave;
char padding[192];
} params;
};