nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Expose logical mask for MIG

Browse Source 
1) Expose logical mask instead of physical mask when MIG is enabled.
   For legacy, NvGpu expose physical mask.
2) Added fb related info in struct nvgpu_gpu_instance().
4) Added utility api to get the logical id for a given local id
   nvgpu_grmgr_get_gr_gpc_logical_id()
5) Added grmgr api to get max_gpc_count
   nvgpu_grmgr_get_max_gpc_count().
5) Added grmgr's fbp api to get num_fbps and its enable masks.
   nvgpu_grmgr_get_num_fbps()
   nvgpu_grmgr_get_fbp_en_mask()
   nvgpu_grmgr_get_fbp_rop_l2_en_mask()
6) Used grmgr's fbp apis in ioctl_ctrl.c
7) Moved fbp_init_support() in nvgpu_early_init()
8) Added nvgpu_assert handling in grmgr.c
9) Added vgpu hal for get_max_gpc_count().

JIRA NVGPU-5656

Change-Id: I90ac2ad99be608001e7d5d754f6242ad26c70cdb
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2538508
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2021-06-02 21:45:15 +05:30
committed by mobile promotions
parent e2d8bdc38d
commit 7d473f4dcc
13 changed files with 181 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
userspace/units/acr/nvgpu-acr.c
View File

@@ -179,10 +179,13 @@ static void nvgpu_init_gr_manager(struct gk20a *g)
struct nvgpu_gpu_instance *gpu_instance = &g->mig.gpu_instance[0];
struct nvgpu_gr_syspipe *gr_syspipe = &gpu_instance->gr_syspipe;
g->mig.max_gpc_count = 1;
g->mig.gpc_count = 1;
g->mig.num_gpu_instances = 1;
g->mig.num_gr_sys_pipes_enabled = 1;
gr_syspipe->gr_instance_id = 0U;
gr_syspipe->gr_syspipe_id = 0U;
gr_syspipe->num_gpc = 1;
}
static int init_acr_falcon_test_env(struct unit_module *m, struct gk20a *g)

3
userspace/units/gr/nvgpu-gr.c
View File

@@ -48,10 +48,13 @@ static void nvgpu_init_gr_manager(struct gk20a *g)
struct nvgpu_gpu_instance *gpu_instance = &g->mig.gpu_instance[0];
struct nvgpu_gr_syspipe *gr_syspipe = &gpu_instance->gr_syspipe;
g->mig.max_gpc_count = 1;
g->mig.gpc_count = 1;
g->mig.num_gpu_instances = 1;
g->mig.num_gr_sys_pipes_enabled = 1;
gr_syspipe->gr_instance_id = 0U;
gr_syspipe->gr_syspipe_id = 0U;
gr_syspipe->num_gpc = 1;
}
int test_gr_init_setup(struct unit_module *m, struct gk20a *g, void *args)

3
userspace/units/ltc/nvgpu-ltc.c
View File

@@ -270,10 +270,13 @@ static void nvgpu_init_gr_manager(struct gk20a *g)
struct nvgpu_gpu_instance *gpu_instance = &g->mig.gpu_instance[0];
struct nvgpu_gr_syspipe *gr_syspipe = &gpu_instance->gr_syspipe;
g->mig.max_gpc_count = 1;
g->mig.gpc_count = 1;
g->mig.num_gpu_instances = 1;
g->mig.num_gr_sys_pipes_enabled = 1;
gr_syspipe->gr_instance_id = 0U;
gr_syspipe->gr_syspipe_id = 0U;
gr_syspipe->num_gpc = 1;
}
int test_ltc_ecc_init_free(struct unit_module *m, struct gk20a *g, void *args)

3
userspace/units/pmu/nvgpu-pmu.c
View File

@@ -167,10 +167,13 @@ static void nvgpu_init_gr_manager(struct gk20a *g)
struct nvgpu_gpu_instance *gpu_instance = &g->mig.gpu_instance[0];
struct nvgpu_gr_syspipe *gr_syspipe = &gpu_instance->gr_syspipe;
g->mig.max_gpc_count = 1;
g->mig.gpc_count = 1;
g->mig.num_gpu_instances = 1;
g->mig.num_gr_sys_pipes_enabled = 1;
gr_syspipe->gr_instance_id = 0U;
gr_syspipe->gr_syspipe_id = 0U;
gr_syspipe->num_gpc = 1;
}
static int init_pmu_falcon_test_env(struct unit_module *m, struct gk20a *g)