diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
index 41695fa6a..799b2db46 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
@@ -54,6 +54,18 @@ static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
 
 /*Forwards*/
 
+int gv11b_alloc_blob_space(struct gk20a *g,
+		size_t size, struct nvgpu_mem *mem)
+{
+	int err;
+
+	gv11b_dbg_pmu("alloc blob space: NVGPU_DMA_FORCE_CONTIGUOUS");
+	err = nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_FORCE_CONTIGUOUS,
+						size, mem);
+
+	return err;
+}
+
 /*Loads ACR bin to FB mem and bootstraps PMU with bootloader code
  * start and end are addresses of ucode blob in non-WPR region*/
 int gv11b_bootstrap_hs_flcn(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
index 5fbe45e2b..004853bee 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
@@ -28,4 +28,6 @@ int gv11b_bootstrap_hs_flcn(struct gk20a *g);
 int gv11b_init_pmu_setup_hw1(struct gk20a *g,
 		void *desc, u32 bl_sz);
 void gv11b_setup_apertures(struct gk20a *g);
+int gv11b_alloc_blob_space(struct gk20a *g, size_t size,
+				struct nvgpu_mem *mem);
 #endif /*__PMU_GP106_H_*/
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index db24a68e8..bdf741d9c 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -743,7 +743,7 @@ int gv11b_init_hal(struct gk20a *g)
 		gops->pmu.prepare_ucode = gp106_prepare_ucode_blob,
 		gops->pmu.pmu_setup_hw_and_bootstrap = gv11b_bootstrap_hs_flcn,
 		gops->pmu.get_wpr = gm20b_wpr_info,
-		gops->pmu.alloc_blob_space = gm20b_alloc_blob_space,
+		gops->pmu.alloc_blob_space = gv11b_alloc_blob_space,
 		gops->pmu.pmu_populate_loader_cfg =
 			gp106_pmu_populate_loader_cfg,
 		gops->pmu.flcn_populate_bl_dmem_desc =