From 7e6dcade985ceb39ad3c51e6bc806043dbdea022 Mon Sep 17 00:00:00 2001 From: Rajesh Devaraj Date: Tue, 13 Oct 2020 13:00:11 +0530 Subject: [PATCH] gpu: nvgpu: remove reporting of rstg and nonblock pipe RSTG_ECC errors are not expected to occur in gv11b since it does not contains R-stage memory. Hence, the reporting of this error has been replaced with BUG(). CE_NONBLOCK_PIPE interrupt is used for notification of completion of copy operation and it is not an error interrupt. Further, this notification has not been used by CUDA. So, the reporting of CE NONBLOCK_PIPE has been removed. JIRA NVGPU-6124 Bug 200616002 Change-Id: Idf027cc27cf854188503d4d4f07d0f54af1da164 Signed-off-by: Rajesh Devaraj Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2427125 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Shashank Singh Reviewed-by: Vaibhav Kachore Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/ce/ce_gp10b_fusa.c | 2 -- drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c | 9 ++++----- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/ce/ce_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/ce/ce_gp10b_fusa.c index 9bc8210b5..d33251f7c 100644 --- a/drivers/gpu/nvgpu/hal/ce/ce_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/ce/ce_gp10b_fusa.c @@ -66,8 +66,6 @@ u32 gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base) ce_intr, inst_id); if ((ce_intr & ce_intr_status_nonblockpipe_pending_f()) != 0U) { - nvgpu_report_ce_err(g, NVGPU_ERR_MODULE_CE, inst_id, - GPU_CE_NONBLOCK_PIPE, ce_intr); nvgpu_writel(g, ce_intr_status_r(inst_id), ce_intr_status_nonblockpipe_pending_f()); ops |= (NVGPU_NONSTALL_OPS_WAKEUP_SEMAPHORE | diff --git a/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c index 962ede532..6b90dbdd1 100644 --- a/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c @@ -112,12 +112,11 @@ void gv11b_ltc_intr_handle_rstg_ecc_interrupts(struct gk20a *g, if ((ecc_status & ltc_ltc0_lts0_l2_cache_ecc_status_uncorrected_err_rstg_m()) != 0U) { - nvgpu_report_ecc_err(g, - NVGPU_ERR_MODULE_LTC, - (ltc << 8U) | slice, - GPU_LTC_CACHE_RSTG_ECC_UNCORRECTED, ecc_addr, - g->ecc.ltc.ecc_ded_count[ltc][slice].counter); nvgpu_log(g, gpu_dbg_intr, "rstg ecc error uncorrected"); + /* This error is not expected to occur in gv11b and hence, + * this scenario is considered as a fatal error. + */ + BUG(); } }