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gpu: nvgpu: Move from TSENSE to TSOSC for TU104

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In TU104 tsense is not calibrated and tsosc needs to be used.
Tsosc is the POR for TU104.
This patch does the following
Remove the GP106 related thermal header and Add TU104 therm.
Rename the files from therm_gp106 to therm_tu104.
Update the debug fs interface to reflect the same.
Update the yaml files.

Bug 200526122

Change-Id: I73fd7d4c516426b5c6b84762480be2d6d572d5a7
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135139
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2019-06-12 19:16:33 +05:30
committed by mobile promotions
parent fcc66f9b90
commit 7e8d0c2bb1
14 changed files with 78 additions and 183 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/nvgpu-hal-new.yaml
View File

@@ -316,8 +316,8 @@ therm:
owner: Seshendra G
sources: [ hal/therm/therm_gm20b.c,
hal/therm/therm_gm20b.h,
hal/therm/therm_gp106.c,
hal/therm/therm_gp106.h,
hal/therm/therm_tu104.c,
hal/therm/therm_tu104.h,
hal/therm/therm_gp10b.c,
hal/therm/therm_gp10b.h,
hal/therm/therm_gv11b.c,

4
arch/nvgpu-linux.yaml
View File

@@ -75,8 +75,8 @@ debug:
os/linux/debug_pmu.h,
os/linux/debug_sched.c,
os/linux/debug_sched.h,
os/linux/debug_therm_gp106.c,
os/linux/debug_therm_gp106.h,
os/linux/debug_therm_tu104.c,
os/linux/debug_therm_tu104.h,
os/linux/debug_xve.c,
os/linux/debug_xve.h,
os/linux/debug_s_param.c,

4
drivers/gpu/nvgpu/Makefile
View File

@@ -254,7 +254,7 @@ nvgpu-y += \
hal/ce/ce_gv11b.o \
hal/therm/therm_gm20b.o \
hal/therm/therm_gp10b.o \
hal/therm/therm_gp106.o \
hal/therm/therm_tu104.o \
hal/therm/therm_gv11b.o \
hal/gr/falcon/gr_falcon_gm20b.o \
hal/gr/falcon/gr_falcon_gp10b.o \
@@ -425,7 +425,7 @@ nvgpu-$(CONFIG_DEBUG_FS) += \
os/linux/debug_allocator.o \
os/linux/debug_hal.o \
os/linux/debug_clk_gm20b.o \
os/linux/debug_therm_gp106.o \
os/linux/debug_therm_tu104.o \
os/linux/debug_bios.o \
os/linux/debug_ltc.o \
os/linux/debug_xve.o \

2
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -411,7 +411,7 @@ srcs += \
common/pmu/pmu_mutex.c \
common/pmu/pmu_pstate.c \
common/clk_arb/clk_arb_gv100.c \
hal/therm/therm_gp106.c \
hal/therm/therm_tu104.c \
hal/pmu/pmu_gk20a.c \
hal/pmu/pmu_gm20b.c \
hal/pmu/pmu_gp10b.c \

6
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -49,7 +49,7 @@
#include "hal/cbc/cbc_gm20b.h"
#include "hal/cbc/cbc_tu104.h"
#include "hal/therm/therm_gm20b.h"
#include "hal/therm/therm_gp106.h"
#include "hal/therm/therm_tu104.h"
#include "hal/therm/therm_gv11b.h"
#include "hal/ltc/ltc_gm20b.h"
#include "hal/ltc/ltc_gp10b.h"
@@ -1090,9 +1090,9 @@ static const struct gpu_ops tu104_ops = {
.elcg_init_idle_filters = NULL,
#ifdef CONFIG_NVGPU_LS_PMU
.get_internal_sensor_curr_temp =
gp106_get_internal_sensor_curr_temp,
tu104_get_internal_sensor_curr_temp,
.get_internal_sensor_limits =
gp106_get_internal_sensor_limits,
tu104_get_internal_sensor_limits,
#endif
},
#ifdef CONFIG_NVGPU_LS_PMU

114
drivers/gpu/nvgpu/hal/therm/therm_gp106.c
View File

@@ -1,114 +0,0 @@
/*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/pmu/therm.h>
#include "therm_gp106.h"
#include <nvgpu/hw/gp106/hw_therm_gp106.h>
#include <nvgpu/utils.h>
void gp106_get_internal_sensor_limits(s32 *max_24_8, s32 *min_24_8)
{
*max_24_8 = (0x87 << 8);
*min_24_8 = (((u32)-216) << 8);
}
int gp106_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8)
{
int err = 0;
u32 readval;
readval = nvgpu_readl(g, therm_temp_sensor_tsense_r());
if ((therm_temp_sensor_tsense_state_v(readval) &
therm_temp_sensor_tsense_state_valid_v()) == 0U) {
nvgpu_err(g,
"Attempt to read temperature while sensor is OFF!");
err = -EINVAL;
} else if ((therm_temp_sensor_tsense_state_v(readval) &
therm_temp_sensor_tsense_state_shadow_v()) != 0U) {
nvgpu_err(g, "Reading temperature from SHADOWed sensor!");
} else {
nvgpu_log_info(g, "Finished reading temperature");
}
// Convert from F9.5 -> F27.5 -> F24.8.
readval &= therm_temp_sensor_tsense_fixed_point_m();
*temp_f24_8 = readval;
return err;
}
int gp106_elcg_init_idle_filters(struct gk20a *g)
{
u32 gate_ctrl, idle_filter;
u32 engine_id;
u32 active_engine_id = 0;
struct nvgpu_fifo *f = &g->fifo;
nvgpu_log_fn(g, " ");
for (engine_id = 0; engine_id < f->num_engines; engine_id++) {
active_engine_id = f->active_engines_list[engine_id];
gate_ctrl = nvgpu_readl(g, therm_gate_ctrl_r(active_engine_id));
gate_ctrl = set_field(gate_ctrl,
therm_gate_ctrl_eng_idle_filt_exp_m(),
therm_gate_ctrl_eng_idle_filt_exp_f(2));
gate_ctrl = set_field(gate_ctrl,
therm_gate_ctrl_eng_idle_filt_mant_m(),
therm_gate_ctrl_eng_idle_filt_mant_f(1));
gate_ctrl = set_field(gate_ctrl,
therm_gate_ctrl_eng_delay_before_m(),
therm_gate_ctrl_eng_delay_before_f(0));
nvgpu_writel(g, therm_gate_ctrl_r(active_engine_id), gate_ctrl);
}
/* default fecs_idle_filter to 0 */
idle_filter = nvgpu_readl(g, therm_fecs_idle_filter_r());
idle_filter &= ~therm_fecs_idle_filter_value_m();
nvgpu_writel(g, therm_fecs_idle_filter_r(), idle_filter);
/* default hubmmu_idle_filter to 0 */
idle_filter = nvgpu_readl(g, therm_hubmmu_idle_filter_r());
idle_filter &= ~therm_hubmmu_idle_filter_value_m();
nvgpu_writel(g, therm_hubmmu_idle_filter_r(), idle_filter);
nvgpu_log_fn(g, "done");
return 0;
}
int gp106_configure_therm_alert(struct gk20a *g, s32 curr_warn_temp)
{
int err = 0;
if (g->curr_warn_temp != curr_warn_temp) {
g->curr_warn_temp = curr_warn_temp;
err = nvgpu_therm_configure_therm_alert(g, g->pmu);
}
return err;
}

51
drivers/gpu/nvgpu/hal/therm/therm_tu104.c Normal file
View File

@@ -0,0 +1,51 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/pmu/therm.h>
#include "therm_tu104.h"
#include <nvgpu/hw/tu104/hw_therm_tu104.h>
#include <nvgpu/utils.h>
void tu104_get_internal_sensor_limits(s32 *max_24_8, s32 *min_24_8)
{
*max_24_8 = (0x87 << 8);
*min_24_8 = (((u32)-216) << 8);
}
int tu104_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8)
{
int err = 0;
u32 readval;
readval = nvgpu_readl(g, therm_i2cs_sensor_00_r());
/* Convert from celsius to f24_8 format*/
*temp_f24_8 = (readval << 8);
return err;
}

12
drivers/gpu/nvgpu/hal/therm/therm_gp106.h → drivers/gpu/nvgpu/hal/therm/therm_tu104.h
View File

@@ -1,7 +1,7 @@
/*
* general thermal control structures & definitions
*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -22,16 +22,14 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_THERM_GP106_H
#define NVGPU_THERM_GP106_H
#ifndef NVGPU_THERM_TU104_H
#define NVGPU_THERM_TU104_H
#include <nvgpu/types.h>
struct gk20a;
void gp106_get_internal_sensor_limits(s32 *max_24_8, s32 *min_24_8);
int gp106_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8);
int gp106_elcg_init_idle_filters(struct gk20a *g);
int gp106_configure_therm_alert(struct gk20a *g, s32 curr_warn_temp);
void tu104_get_internal_sensor_limits(s32 *max_24_8, s32 *min_24_8);
int tu104_get_internal_sensor_curr_temp(struct gk20a *g, u32 *temp_f24_8);
#endif

44
drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_therm_gp106.h
View File

@@ -59,50 +59,6 @@
#include <nvgpu/types.h>
#include <nvgpu/safe_ops.h>
static inline u32 therm_temp_sensor_tsense_r(void)
{
return 0x00020460U;
}
static inline u32 therm_temp_sensor_tsense_fixed_point_f(u32 v)
{
return (v & 0x3fffU) << 3U;
}
static inline u32 therm_temp_sensor_tsense_fixed_point_m(void)
{
return U32(0x3fffU) << 3U;
}
static inline u32 therm_temp_sensor_tsense_fixed_point_v(u32 r)
{
return (r >> 3U) & 0x3fffU;
}
static inline u32 therm_temp_sensor_tsense_fixed_point_min_v(void)
{
return 0x00003b00U;
}
static inline u32 therm_temp_sensor_tsense_fixed_point_max_v(void)
{
return 0x000010e0U;
}
static inline u32 therm_temp_sensor_tsense_state_f(u32 v)
{
return (v & 0x3U) << 29U;
}
static inline u32 therm_temp_sensor_tsense_state_m(void)
{
return U32(0x3U) << 29U;
}
static inline u32 therm_temp_sensor_tsense_state_v(u32 r)
{
return (r >> 29U) & 0x3U;
}
static inline u32 therm_temp_sensor_tsense_state_valid_v(void)
{
return 0x00000001U;
}
static inline u32 therm_temp_sensor_tsense_state_shadow_v(void)
{
return 0x00000002U;
}
static inline u32 therm_gate_ctrl_r(u32 i)
{
return nvgpu_safe_add_u32(0x00020200U, nvgpu_safe_mult_u32(i, 4U));

4
drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_therm_tu104.h
View File

@@ -299,4 +299,8 @@ static inline u32 therm_clk_timing_grad_slowdown_enabled_f(void)
{
return 0x10000U;
}
static inline u32 therm_i2cs_sensor_00_r(void)
{
return 0x00020400U;
}
#endif

4
drivers/gpu/nvgpu/os/linux/debug_therm_gp106.c → drivers/gpu/nvgpu/os/linux/debug_therm_tu104.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2019, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -35,7 +35,7 @@ static int therm_get_internal_sensor_curr_temp(void *data, u64 *val)
}
DEFINE_SIMPLE_ATTRIBUTE(therm_ctrl_fops, therm_get_internal_sensor_curr_temp, NULL, "%llu\n");
int gp106_therm_init_debugfs(struct gk20a *g)
int tu104_therm_init_debugfs(struct gk20a *g)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct dentry *dbgentry;

4
drivers/gpu/nvgpu/os/linux/debug_therm_gp106.h → drivers/gpu/nvgpu/os/linux/debug_therm_tu104.h
View File

@@ -18,9 +18,9 @@
#define __DEBUG_THERM_GP106_H
#ifdef CONFIG_DEBUG_FS
int gp106_therm_init_debugfs(struct gk20a *g);
int tu104_therm_init_debugfs(struct gk20a *g);
#else
static inline int gp106_therm_init_debugfs(struct gk20a *g)
static inline int tu104_therm_init_debugfs(struct gk20a *g)
{
return 0;
}

4
drivers/gpu/nvgpu/os/linux/os_ops_gv100.c
View File

@@ -17,7 +17,7 @@
#include "os_linux.h"
#include "debug_clk_gv100.h"
#include "debug_therm_gp106.h"
#include "debug_therm_tu104.h"
#include "debug_fecs_trace.h"
static struct nvgpu_os_linux_ops gv100_os_linux_ops = {
@@ -25,7 +25,7 @@ static struct nvgpu_os_linux_ops gv100_os_linux_ops = {
.init_debugfs = gv100_clk_init_debugfs,
},
.therm = {
.init_debugfs = gp106_therm_init_debugfs,
.init_debugfs = tu104_therm_init_debugfs,
},
.fecs_trace = {
.init_debugfs = nvgpu_fecs_trace_init_debugfs,

4
drivers/gpu/nvgpu/os/linux/os_ops_tu104.c
View File

@@ -16,14 +16,14 @@
#include "os/linux/os_linux.h"
#include "os/linux/debug_therm_gp106.h"
#include "os/linux/debug_therm_tu104.h"
#include "os/linux/debug_clk_gv100.h"
#include "os/linux/debug_volt.h"
#include "os/linux/debug_s_param.h"
static struct nvgpu_os_linux_ops tu104_os_linux_ops = {
.therm = {
.init_debugfs = gp106_therm_init_debugfs,
.init_debugfs = tu104_therm_init_debugfs,
},
.clk = {
.init_debugfs = gv100_clk_init_debugfs,