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gpu: nvgpu: rework ecc structure and sysfs
- create common file common/ecc.c which include common functions for add ecc counters and remove counters. - common code will create a list of all counter which make it easier to iterate all counters. - Add chip specific file for adding ecc counters. - add linux specific file os/linux/ecc_sysfs.c to export counters to sysfs. - remove obsolete code - MISRA violation for using snprintf is not solved, tracking with jira NVGPU-859 Jira NVGPUT-115 Change-Id: I1905c43c5c9b2b131199807533dee8e63ddc12f4 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1763536 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Richard Zhao
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162
drivers/gpu/nvgpu/include/nvgpu/ecc.h
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162
drivers/gpu/nvgpu/include/nvgpu/ecc.h
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/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_ECC_H
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#define NVGPU_ECC_H
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#include <nvgpu/types.h>
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#include <nvgpu/list.h>
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#define NVGPU_ECC_STAT_NAME_MAX_SIZE 100
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struct gk20a;
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struct nvgpu_ecc_stat {
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char name[NVGPU_ECC_STAT_NAME_MAX_SIZE];
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u32 counter;
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struct nvgpu_list_node node;
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};
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static inline struct nvgpu_ecc_stat *nvgpu_ecc_stat_from_node(
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struct nvgpu_list_node *node)
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{
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return (struct nvgpu_ecc_stat *)(
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(uintptr_t)node - offsetof(struct nvgpu_ecc_stat, node)
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);
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}
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struct nvgpu_ecc {
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struct {
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/* stats per tpc */
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struct nvgpu_ecc_stat **sm_lrf_ecc_single_err_count;
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struct nvgpu_ecc_stat **sm_lrf_ecc_double_err_count;
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struct nvgpu_ecc_stat **sm_shm_ecc_sec_count;
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struct nvgpu_ecc_stat **sm_shm_ecc_sed_count;
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struct nvgpu_ecc_stat **sm_shm_ecc_ded_count;
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struct nvgpu_ecc_stat **tex_ecc_total_sec_pipe0_count;
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struct nvgpu_ecc_stat **tex_ecc_total_ded_pipe0_count;
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struct nvgpu_ecc_stat **tex_unique_ecc_sec_pipe0_count;
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struct nvgpu_ecc_stat **tex_unique_ecc_ded_pipe0_count;
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struct nvgpu_ecc_stat **tex_ecc_total_sec_pipe1_count;
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struct nvgpu_ecc_stat **tex_ecc_total_ded_pipe1_count;
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struct nvgpu_ecc_stat **tex_unique_ecc_sec_pipe1_count;
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struct nvgpu_ecc_stat **tex_unique_ecc_ded_pipe1_count;
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struct nvgpu_ecc_stat **sm_l1_tag_ecc_corrected_err_count;
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struct nvgpu_ecc_stat **sm_l1_tag_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat **sm_cbu_ecc_corrected_err_count;
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struct nvgpu_ecc_stat **sm_cbu_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat **sm_l1_data_ecc_corrected_err_count;
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struct nvgpu_ecc_stat **sm_l1_data_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat **sm_icache_ecc_corrected_err_count;
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struct nvgpu_ecc_stat **sm_icache_ecc_uncorrected_err_count;
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/* stats per gpc */
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struct nvgpu_ecc_stat *gcc_l15_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *gcc_l15_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat *gpccs_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *gpccs_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat *mmu_l1tlb_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *mmu_l1tlb_ecc_uncorrected_err_count;
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/* stats per device */
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struct nvgpu_ecc_stat *fecs_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *fecs_ecc_uncorrected_err_count;
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} gr;
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struct {
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/* stats per lts */
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struct nvgpu_ecc_stat **ecc_sec_count;
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struct nvgpu_ecc_stat **ecc_ded_count;
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} ltc;
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struct {
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/* stats per device */
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struct nvgpu_ecc_stat *mmu_l2tlb_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *mmu_l2tlb_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat *mmu_hubtlb_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *mmu_hubtlb_ecc_uncorrected_err_count;
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struct nvgpu_ecc_stat *mmu_fillunit_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *mmu_fillunit_ecc_uncorrected_err_count;
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} fb;
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struct {
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/* stats per device */
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struct nvgpu_ecc_stat *pmu_ecc_corrected_err_count;
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struct nvgpu_ecc_stat *pmu_ecc_uncorrected_err_count;
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} pmu;
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struct {
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/* stats per fbpa */
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struct nvgpu_ecc_stat *fbpa_ecc_sec_err_count;
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struct nvgpu_ecc_stat *fbpa_ecc_ded_err_count;
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} fbpa;
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struct nvgpu_list_node stats_list;
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int stats_count;
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};
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int nvgpu_ecc_counter_init_per_tpc(struct gk20a *g,
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struct nvgpu_ecc_stat ***stat, const char *name);
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#define NVGPU_ECC_COUNTER_INIT_PER_TPC(stat) \
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nvgpu_ecc_counter_init_per_tpc(g, &g->ecc.gr.stat, #stat)
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int nvgpu_ecc_counter_init_per_gpc(struct gk20a *g,
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struct nvgpu_ecc_stat **stat, const char *name);
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#define NVGPU_ECC_COUNTER_INIT_PER_GPC(stat) \
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nvgpu_ecc_counter_init_per_gpc(g, &g->ecc.gr.stat, #stat)
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int nvgpu_ecc_counter_init(struct gk20a *g,
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struct nvgpu_ecc_stat **stat, const char *name);
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#define NVGPU_ECC_COUNTER_INIT_GR(stat) \
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nvgpu_ecc_counter_init(g, &g->ecc.gr.stat, #stat)
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#define NVGPU_ECC_COUNTER_INIT_FB(stat) \
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nvgpu_ecc_counter_init(g, &g->ecc.fb.stat, #stat)
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#define NVGPU_ECC_COUNTER_INIT_PMU(stat) \
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nvgpu_ecc_counter_init(g, &g->ecc.pmu.stat, #stat)
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int nvgpu_ecc_counter_init_per_lts(struct gk20a *g,
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struct nvgpu_ecc_stat ***stat, const char *name);
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#define NVGPU_ECC_COUNTER_INIT_PER_LTS(stat) \
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nvgpu_ecc_counter_init_per_lts(g, &g->ecc.ltc.stat, #stat)
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int nvgpu_ecc_counter_init_per_fbpa(struct gk20a *g,
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struct nvgpu_ecc_stat **stat, const char *name);
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#define NVGPU_ECC_COUNTER_INIT_PER_FBPA(stat) \
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nvgpu_ecc_counter_init_per_fbpa(g, &g->ecc.fbpa.stat, #stat)
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void nvgpu_ecc_free(struct gk20a *g);
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int nvgpu_ecc_init_support(struct gk20a *g);
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void nvgpu_ecc_remove_support(struct gk20a *g);
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/* OSes to implement */
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int nvgpu_ecc_sysfs_init(struct gk20a *g);
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void nvgpu_ecc_sysfs_remove(struct gk20a *g);
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#endif
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