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gpu: nvgpu: update pma stream teardown sequence

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On nvgpu-next chips additional steps are required for pma stream teardown.
Introduce wrapper function: NVGPU_NEXT_PROFILER_QUIESCE to perform this.

Jira NVGPU-5689

Change-Id: Iafdb9c6091b468b51295827467078d24e47d5e1f
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491755
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Antony Clince Alex
2021-03-02 14:18:03 +05:30
committed by mobile promotions
parent 78dbec7f44
commit 7f4e39aaf4
2 changed files with 13 additions and 2 deletions
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10
drivers/gpu/nvgpu/common/profiler/profiler.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -36,6 +36,10 @@
#include <nvgpu/regops.h> #include <nvgpu/regops.h>
#include <nvgpu/sort.h> #include <nvgpu/sort.h>
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "nvgpu_next_gpuid.h"
#endif
static int nvgpu_profiler_build_regops_allowlist(struct nvgpu_profiler_object *prof); static int nvgpu_profiler_build_regops_allowlist(struct nvgpu_profiler_object *prof);
static void nvgpu_profiler_destroy_regops_allowlist(struct nvgpu_profiler_object *prof); static void nvgpu_profiler_destroy_regops_allowlist(struct nvgpu_profiler_object *prof);
@@ -426,6 +430,10 @@ static int nvgpu_profiler_quiesce_hwpm_streamout_resident(struct nvgpu_profiler_
goto fail; goto fail;
} }
#ifdef CONFIG_NVGPU_NEXT
NVGPU_NEXT_PROFILER_QUIESCE(g);
#endif
/* Disable streamout */ /* Disable streamout */
g->ops.perf.pma_stream_enable(g, false); g->ops.perf.pma_stream_enable(g, false);

5
drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -101,6 +101,9 @@ struct gops_perf {
void (*disable_all_perfmons)(struct gk20a *g); void (*disable_all_perfmons)(struct gk20a *g);
int (*wait_for_idle_pmm_routers)(struct gk20a *g); int (*wait_for_idle_pmm_routers)(struct gk20a *g);
int (*wait_for_idle_pma)(struct gk20a *g); int (*wait_for_idle_pma)(struct gk20a *g);
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "include/nvgpu/nvgpu_next_gops_perf.h"
#endif
}; };
struct gops_perfbuf { struct gops_perfbuf {
int (*perfbuf_enable)(struct gk20a *g, u64 offset, u32 size); int (*perfbuf_enable)(struct gk20a *g, u64 offset, u32 size);