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gpu: nvgpu: Updated traceability in ACR and PMU

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Updated unit test specifcation in ACR and PMU
unit and add traceability from test to design.

JIRA NVGPU-4319
JIRA NVGPU-2192

Change-Id: Iadffaf42f0844c556ba6d9b898d2896863ff0237
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2301579
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2020-02-20 17:43:04 +05:30
committed by Alex Waterman
parent 00b7ea7f13
commit 7fb3410d72
6 changed files with 23 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.h
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@@ -37,7 +37,6 @@ bool gv11b_pmu_is_engine_in_reset(struct gk20a *g);
void gv11b_pmu_engine_reset(struct gk20a *g, bool do_reset); void gv11b_pmu_engine_reset(struct gk20a *g, bool do_reset);
u32 gv11b_pmu_falcon_base_addr(void); u32 gv11b_pmu_falcon_base_addr(void);
bool gv11b_is_pmu_supported(struct gk20a *g); bool gv11b_is_pmu_supported(struct gk20a *g);
int gv11b_pmu_correct_ecc(struct gk20a *g, u32 ecc_status, u32 ecc_addr);
void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0); void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0);
#ifdef CONFIG_NVGPU_LS_PMU #ifdef CONFIG_NVGPU_LS_PMU

2
drivers/gpu/nvgpu/hal/pmu/pmu_gv11b_fusa.c
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@@ -134,7 +134,7 @@ int gv11b_pmu_bar0_error_status(struct gk20a *g, u32 *bar0_status,
return (-EIO); return (-EIO);
} }
int gv11b_pmu_correct_ecc(struct gk20a *g, u32 ecc_status, u32 ecc_addr) static int gv11b_pmu_correct_ecc(struct gk20a *g, u32 ecc_status, u32 ecc_addr)
{ {
int ret = 0; int ret = 0;

2
userspace/SWUTS.sources
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@@ -122,5 +122,5 @@ INPUT += ../../../userspace/units/gr/ctx/nvgpu-gr-ctx.h
INPUT += ../../../userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.h INPUT += ../../../userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.h
INPUT += ../../../userspace/units/gr/config/nvgpu-gr-config.h INPUT += ../../../userspace/units/gr/config/nvgpu-gr-config.h
INPUT += ../../../userspace/units/ecc/nvgpu-ecc.h INPUT += ../../../userspace/units/ecc/nvgpu-ecc.h
INPUT += ../../../userspace/units/ecc/nvgpu-pmu.h INPUT += ../../../userspace/units/pmu/nvgpu-pmu.h
INPUT += ../../../userspace/units/io/common_io.h INPUT += ../../../userspace/units/io/common_io.h

9
userspace/units/acr/nvgpu-acr.h
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@@ -119,7 +119,7 @@ int test_acr_is_lsf_lazy_bootstrap(struct unit_module *m, struct gk20a *g,
* *
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: g->ops.acr.acr_construct_execute * Targets: nvgpu_acr_construct_execute
* *
* Input: None * Input: None
* *
@@ -149,7 +149,12 @@ int test_acr_construct_execute(struct unit_module *m,
* *
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: nvgpu_acr_bootstrap_hs_acr * Targets: nvgpu_acr_bootstrap_hs_acr, nvgpu_pmu_report_bar0_pri_err_status,
* gops_pmu.validate_mem_integrity, gv11b_pmu_validate_mem_integrity,
* gops_pmu.is_debug_mode_enabled, gv11b_pmu_is_debug_mode_en,
* gops_acr.pmu_clear_bar0_host_err_status,
* gv11b_clear_pmu_bar0_host_err_status, gops_pmu.bar0_error_status,
* gv11b_pmu_bar0_error_status
* *
* Input: None * Input: None
* *

5
userspace/units/falcon/falcon_tests/nvgpu-falcon.h
View File

@@ -38,7 +38,10 @@ struct unit_module;
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: nvgpu_falcon_get_instance, nvgpu_falcon_sw_init, * Targets: nvgpu_falcon_get_instance, nvgpu_falcon_sw_init,
* nvgpu_falcon_sw_free * nvgpu_falcon_sw_free, gops_pmu.falcon_base_addr,
* gv11b_pmu_falcon_base_addr, gops_pmu.setup_apertures,
* gv11b_setup_apertures, gops_pmu.flcn_setup_boot_config,
* gv11b_pmu_flcn_setup_boot_config
* *
* Input: None. * Input: None.
* *

14
userspace/units/pmu/nvgpu-pmu.h
View File

@@ -37,7 +37,8 @@ struct unit_module;
* *
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: nvgpu_pmu_early_init * Targets: gops_pmu.pmu_early_init, nvgpu_pmu_early_init, gops_pmu.ecc_init,
* gv11b_pmu_ecc_init, gops_pmu.ecc_free, gv11b_pmu_ecc_free
* *
* Input: None * Input: None
* *
@@ -65,7 +66,7 @@ int test_pmu_early_init(struct unit_module *m, struct gk20a *g, void *args);
* *
* Test Type: Error guessing * Test Type: Error guessing
* *
* Targets: g->ops.pmu.is_pmu_supported * Targets: gops_pmu.is_pmu_supported, gv11b_is_pmu_supported
* *
* Input: None * Input: None
* Steps: * Steps:
@@ -110,7 +111,11 @@ int test_pmu_remove_support(struct unit_module *m, struct gk20a *g,
* *
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: nvgpu_pmu_reset * Targets: nvgpu_pmu_enable_irq, nvgpu_pmu_reset, gops_pmu.pmu_enable_irq,
* gv11b_pmu_enable_irq,
* gops_pmu.get_irqdest, gv11b_pmu_get_irqdest,
* gops_pmu.reset_engine, gv11b_pmu_engine_reset,
* gops_pmu.is_engine_in_reset, gv11b_pmu_is_engine_in_reset
* *
* Input: None * Input: None
* *
@@ -142,7 +147,8 @@ int test_pmu_reset(struct unit_module *m, struct gk20a *g,
* *
* Test Type: Feature, Error guessing * Test Type: Feature, Error guessing
* *
* Targets: g->ops.pmu.pmu_isr * Targets: gops_pmu.pmu_isr, gk20a_pmu_isr,
gops_pmu.handle_ext_irq, gv11b_pmu_handle_ext_irq
* *
* Input: None * Input: None
* *