From 8057514a9f7fc5f175e2e0571dfa91d78ebb6410 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Tue, 30 Apr 2019 17:19:51 -0700 Subject: [PATCH] gpu: nvgpu: set FB/HSMMU debug mode Set NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and NV_PFB_PRI_MMU_DEBUG_CTRL in addition to NV_PGRAPH_PRI_GPCS_MMU_DEBUG_CTRL, in NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE Bug 2515097 Change-Id: I1763b43e79fac3edb68a35980683d58bfa89519f Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2115785 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/tsg.c | 33 ++++++++++++++----- drivers/gpu/nvgpu/hal/fb/fb_gm20b.h | 1 + drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c | 10 ++++-- drivers/gpu/nvgpu/hal/fb/fb_gv100.c | 24 ++++++++++++++ drivers/gpu/nvgpu/hal/fb/fb_gv100.h | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_tu104.c | 1 + .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c | 1 + .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c | 1 + drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 2 ++ drivers/gpu/nvgpu/os/linux/ioctl_dbg.c | 3 +- 13 files changed, 68 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/nvgpu/common/fifo/tsg.c b/drivers/gpu/nvgpu/common/fifo/tsg.c index a6835d633..0f1dd206b 100644 --- a/drivers/gpu/nvgpu/common/fifo/tsg.c +++ b/drivers/gpu/nvgpu/common/fifo/tsg.c @@ -893,13 +893,15 @@ int nvgpu_tsg_set_mmu_debug_mode(struct nvgpu_tsg *tsg, struct gk20a *g; int err = 0; u32 tsg_refcnt; + u32 fb_refcnt; if ((ch == NULL) || (tsg == NULL)) { return -EINVAL; } g = ch->g; - if (g->ops.gr.set_mmu_debug_mode == NULL) { + if ((g->ops.fb.set_mmu_debug_mode == NULL) && + (g->ops.gr.set_mmu_debug_mode == NULL)) { return -ENOSYS; } @@ -909,26 +911,39 @@ int nvgpu_tsg_set_mmu_debug_mode(struct nvgpu_tsg *tsg, return 0; } tsg_refcnt = tsg->mmu_debug_mode_refcnt + 1U; + fb_refcnt = g->mmu_debug_mode_refcnt + 1U; } else { if (!ch->mmu_debug_mode_enabled) { /* already disabled for this channel */ return 0; } tsg_refcnt = tsg->mmu_debug_mode_refcnt - 1U; + fb_refcnt = g->mmu_debug_mode_refcnt - 1U; } - /* - * enable GPC MMU debug mode if it was requested for at - * least one channel in the TSG - */ - err = g->ops.gr.set_mmu_debug_mode(g, ch, tsg_refcnt > 0U); - if (err != 0) { - nvgpu_err(g, "set mmu debug mode failed, err=%d", err); - return err; + if (g->ops.gr.set_mmu_debug_mode != NULL) { + /* + * enable GPC MMU debug mode if it was requested for at + * least one channel in the TSG + */ + err = g->ops.gr.set_mmu_debug_mode(g, ch, tsg_refcnt > 0U); + if (err != 0) { + nvgpu_err(g, "set mmu debug mode failed, err=%d", err); + return err; + } + } + + if (g->ops.fb.set_mmu_debug_mode != NULL) { + /* + * enable FB/HS MMU debug mode if it was requested for + * at least one TSG + */ + g->ops.fb.set_mmu_debug_mode(g, fb_refcnt > 0U); } ch->mmu_debug_mode_enabled = enable; tsg->mmu_debug_mode_refcnt = tsg_refcnt; + g->mmu_debug_mode_refcnt = fb_refcnt; return err; } diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gm20b.h b/drivers/gpu/nvgpu/hal/fb/fb_gm20b.h index 751e59a67..297887a8f 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gm20b.h +++ b/drivers/gpu/nvgpu/hal/fb/fb_gm20b.h @@ -51,6 +51,7 @@ int gm20b_fb_vpr_info_fetch(struct gk20a *g); #ifdef CONFIG_NVGPU_DEBUGGER bool gm20b_fb_debug_mode_enabled(struct gk20a *g); void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable); +void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable); #endif #endif diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c b/drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c index 1a6e7512d..4b38c343a 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c @@ -50,7 +50,7 @@ bool gm20b_fb_debug_mode_enabled(struct gk20a *g) fb_mmu_debug_ctrl_debug_enabled_v(); } -void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) +void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable) { u32 reg_val, fb_debug_ctrl; @@ -62,11 +62,15 @@ void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) g->mmu_debug_ctrl = false; } - reg_val = gk20a_readl(g, fb_mmu_debug_ctrl_r()); + reg_val = nvgpu_readl(g, fb_mmu_debug_ctrl_r()); reg_val = set_field(reg_val, fb_mmu_debug_ctrl_debug_m(), fb_debug_ctrl); - gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val); + nvgpu_writel(g, fb_mmu_debug_ctrl_r(), reg_val); +} +void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) +{ + gm20b_fb_set_mmu_debug_mode(g, enable); g->ops.gr.set_debug_mode(g, enable); } #endif diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv100.c b/drivers/gpu/nvgpu/hal/fb/fb_gv100.c index 0cdd84ac0..faf5d1807 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv100.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv100.c @@ -182,3 +182,27 @@ size_t gv100_fb_get_vidmem_size(struct gk20a *g) return bytes; } #endif + +void gv100_fb_set_mmu_debug_mode(struct gk20a *g, bool enable) +{ + u32 data, fb_ctrl, hsmmu_ctrl; + + if (enable) { + fb_ctrl = fb_mmu_debug_ctrl_debug_enabled_f(); + hsmmu_ctrl = fb_hsmmu_pri_mmu_debug_ctrl_debug_enabled_f(); + g->mmu_debug_ctrl = true; + } else { + fb_ctrl = fb_mmu_debug_ctrl_debug_disabled_f(); + hsmmu_ctrl = fb_hsmmu_pri_mmu_debug_ctrl_debug_disabled_f(); + g->mmu_debug_ctrl = false; + } + + data = nvgpu_readl(g, fb_mmu_debug_ctrl_r()); + data = set_field(data, fb_mmu_debug_ctrl_debug_m(), fb_ctrl); + nvgpu_writel(g, fb_mmu_debug_ctrl_r(), data); + + data = nvgpu_readl(g, fb_hsmmu_pri_mmu_debug_ctrl_r()); + data = set_field(data, + fb_hsmmu_pri_mmu_debug_ctrl_debug_m(), hsmmu_ctrl); + nvgpu_writel(g, fb_hsmmu_pri_mmu_debug_ctrl_r(), data); +} diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv100.h b/drivers/gpu/nvgpu/hal/fb/fb_gv100.h index 8f2476698..7aacb8607 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv100.h +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv100.h @@ -34,4 +34,6 @@ int gv100_fb_enable_nvlink(struct gk20a *g); #ifdef CONFIG_NVGPU_DGPU size_t gv100_fb_get_vidmem_size(struct gk20a *g); #endif +void gv100_fb_set_mmu_debug_mode(struct gk20a *g, bool enable); + #endif /* NVGPU_FB_GV100_H */ diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index aca80f1af..595031f14 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -582,6 +582,7 @@ static const struct gpu_ops gm20b_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled, .set_debug_mode = gm20b_fb_set_debug_mode, + .set_mmu_debug_mode = gm20b_fb_set_mmu_debug_mode, #endif .tlb_invalidate = gm20b_fb_tlb_invalidate, .mem_unlock = NULL, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 48a824f5a..5ad2b2e83 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -651,6 +651,7 @@ static const struct gpu_ops gp10b_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled, .set_debug_mode = gm20b_fb_set_debug_mode, + .set_mmu_debug_mode = gm20b_fb_set_mmu_debug_mode, #endif .tlb_invalidate = gm20b_fb_tlb_invalidate, .mem_unlock = NULL, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index cfcbef12a..5d421f67d 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -783,6 +783,7 @@ static const struct gpu_ops gv11b_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled, .set_debug_mode = gm20b_fb_set_debug_mode, + .set_mmu_debug_mode = gm20b_fb_set_mmu_debug_mode, #endif .tlb_invalidate = gm20b_fb_tlb_invalidate, .handle_replayable_fault = gv11b_fb_handle_replayable_mmu_fault, diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 947b0ace1..d7c6d01c0 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -800,6 +800,7 @@ static const struct gpu_ops tu104_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled, .set_debug_mode = gm20b_fb_set_debug_mode, + .set_mmu_debug_mode = gv100_fb_set_mmu_debug_mode, #endif .tlb_invalidate = fb_tu104_tlb_invalidate, .handle_replayable_fault = gv11b_fb_handle_replayable_mmu_fault, diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c index 2fe69daa1..7fac4c369 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c @@ -435,6 +435,7 @@ static const struct gpu_ops vgpu_gp10b_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = NULL, .set_debug_mode = vgpu_mm_mmu_set_debug_mode, + .set_mmu_debug_mode = NULL, #endif .tlb_invalidate = vgpu_mm_tlb_invalidate, }, diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c index b6dad7051..c0ff74170 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c @@ -523,6 +523,7 @@ static const struct gpu_ops vgpu_gv11b_ops = { #ifdef CONFIG_NVGPU_DEBUGGER .is_debug_mode_enabled = NULL, .set_debug_mode = vgpu_mm_mmu_set_debug_mode, + .set_mmu_debug_mode = NULL, #endif .tlb_invalidate = vgpu_mm_tlb_invalidate, .write_mmu_fault_buffer_lo_hi = diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 8ebc441a4..4b7207423 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -993,6 +993,7 @@ struct gpu_ops { #ifdef CONFIG_NVGPU_DEBUGGER bool (*is_debug_mode_enabled)(struct gk20a *g); void (*set_debug_mode)(struct gk20a *g, bool enable); + void (*set_mmu_debug_mode)(struct gk20a *g, bool enable); #endif int (*tlb_invalidate)(struct gk20a *g, struct nvgpu_mem *pdb); void (*handle_replayable_fault)(struct gk20a *g); @@ -2125,6 +2126,7 @@ struct gk20a { int profiler_reservation_count; bool mmu_debug_ctrl; + u32 mmu_debug_mode_refcnt; #endif /* CONFIG_NVGPU_DEBUGGER */ #ifdef CONFIG_NVGPU_FECS_TRACE diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c index e357ac8d2..6030d4faa 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c @@ -1094,7 +1094,8 @@ static int nvgpu_dbg_gpu_ioctl_set_mmu_debug_mode( return -EINVAL; } - if (g->ops.gr.set_mmu_debug_mode == NULL) { + if ((g->ops.fb.set_mmu_debug_mode == NULL) && + (g->ops.gr.set_mmu_debug_mode == NULL)) { return -ENOSYS; }