gpu: nvgpu: add BVEC test for nvgpu_rc_pbdma_fault

Update nvgpu_rc_pbdma_fault with invalid checks and add BVEC test
for it.

Make ga10b_fifo_pbdma_isr static.

NVGPU-6772

Change-Id: I5485760c53e1fff1278557a5b25659a1fc0e4eaf
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2551617
(cherry picked from commit e917042d395d07cb902580bad3d5a7d0096cc303)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623625
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2021-06-29 23:44:25 +05:30
committed by mobile promotions
parent d8e8eb65d3
commit 80efe558b1
24 changed files with 298 additions and 92 deletions

View File

@@ -27,7 +27,7 @@
struct nvgpu_channel;
enum {
enum nvgpu_err_notif {
NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT = 0,
NVGPU_ERR_NOTIFIER_GR_ERROR_SW_METHOD,
NVGPU_ERR_NOTIFIER_GR_ERROR_SW_NOTIFY,
@@ -40,6 +40,7 @@ enum {
NVGPU_ERR_NOTIFIER_RESETCHANNEL_VERIF_ERROR,
NVGPU_ERR_NOTIFIER_PBDMA_PUSHBUFFER_CRC_MISMATCH,
NVGPU_ERR_NOTIFIER_CE_ERROR,
NVGPU_ERR_NOTIFIER_INVAL,
};
void nvgpu_set_err_notifier_locked(struct nvgpu_channel *ch, u32 error);

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -51,7 +51,7 @@ struct gops_pbdma {
bool (*handle_intr_1)(struct gk20a *g,
u32 pbdma_id, u32 pbdma_intr_1,
u32 *error_notifier);
void (*handle_intr)(struct gk20a *g, u32 pbdma_id, bool recover);
int (*handle_intr)(struct gk20a *g, u32 pbdma_id, bool recover);
u32 (*set_clear_intr_offsets) (struct gk20a *g,
u32 set_clear_size);
u32 (*get_signature)(struct gk20a *g);

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -150,6 +150,17 @@ bool nvgpu_pbdma_status_is_chsw_save(struct nvgpu_pbdma_status_info
*/
bool nvgpu_pbdma_status_is_chsw_valid(struct nvgpu_pbdma_status_info
*pbdma_status);
/**
* @brief Check if chsw_status is set to invalid.
*
* @param pbdma_status [in] Pointer to struct containing pbdma_status h/w
* reg/field value.
*
* @return Interprets #pbdma_status and returns true if channel
* status is set to #NVGPU_PBDMA_CHSW_STATUS_INVALID else returns false.
*/
bool nvgpu_pbdma_status_ch_not_loaded(struct nvgpu_pbdma_status_info
*pbdma_status);
/**
* @brief Check if id_type is tsg.
*

View File

@@ -103,6 +103,7 @@ struct nvgpu_tsg;
struct nvgpu_channel;
struct nvgpu_pbdma_status_info;
struct mmu_fault_info;
enum nvgpu_err_notif;
static inline const char *nvgpu_rc_type_to_str(unsigned int rc_type)
{
@@ -172,8 +173,16 @@ void nvgpu_rc_ctxsw_timeout(struct gk20a *g, u32 eng_bitmask,
*
* Do PBDMA fault recovery. Set error notifier as per \a error_notifier and call
* \a nvgpu_rc_tsg_and_related_engines to do the recovery.
*
* @return 0 in case of success, < 0 in case of failure.
* @retval -EINVAL in case of following cases:
* 1. the error_notifier is invalid.
* 2. the pbdma status is invalid.
* 3. the channel is not referenceable.
* 4. the channel is not bound to tsg.
* 5. the id type or next_id type are not indicating channel id type or tsg id type.
*/
void nvgpu_rc_pbdma_fault(struct gk20a *g, u32 pbdma_id, u32 error_notifier,
int nvgpu_rc_pbdma_fault(struct gk20a *g, u32 pbdma_id, enum nvgpu_err_notif error_notifier,
struct nvgpu_pbdma_status_info *pbdma_status);
/**