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gpu: nvgpu: accessors for FB/HSSMU MMU_DEBUG_CTRL

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Add accessors for NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and
NV_PFB_PRI_MMU_DEBUG_CTRL

Bug 2515097
Bug 2713590

Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Change-Id: Ieadee041854bc9a17721b5b17938a106e205517f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208770
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-09-27 16:18:19 -04:00
committed by mobile promotions
parent 9e328ed6b8
commit 8110cee828
1 changed files with 29 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -244,6 +244,26 @@ static inline u32 fb_hsmmu_pri_mmu_ctrl_atomic_capability_mode_power_f(void)
{ {
return 0x3000000U; return 0x3000000U;
} }
static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_r(void)
{
return 0x001facc4U;
}
static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_v(u32 r)
{
return (r >> 16U) & 0x1U;
}
static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_m(void)
{
return 0x1U << 16U;
}
static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_enabled_f(void)
{
return 0x10000U;
}
static inline u32 fb_hsmmu_pri_mmu_debug_ctrl_debug_disabled_f(void)
{
return 0x0U;
}
static inline u32 fb_hshub_num_active_ltcs_r(void) static inline u32 fb_hshub_num_active_ltcs_r(void)
{ {
return 0x001fbc20U; return 0x001fbc20U;
@@ -676,10 +696,18 @@ static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void)
{ {
return 0x00000001U; return 0x00000001U;
} }
static inline u32 fb_mmu_debug_ctrl_debug_enabled_f(void)
{
return 0x10000U;
}
static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void)
{ {
return 0x00000000U; return 0x00000000U;
} }
static inline u32 fb_mmu_debug_ctrl_debug_disabled_f(void)
{
return 0x0U;
}
static inline u32 fb_niso_cfg1_r(void) static inline u32 fb_niso_cfg1_r(void)
{ {
return 0x00100c14U; return 0x00100c14U;