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gpu: nvgpu: add FBPROUTER/GPCROUTER base and extents

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Added FBPRouter and GPCRouter Pri Register Ranges

Bug 200712091

Change-Id: I10cb4acb48c6100a517b45c39a6cf9aea9853919
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2650577
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Debarshi Dutta
2022-01-26 07:29:19 +05:30
committed by mobile promotions
parent e33bdceb8b
commit 815c49278e
2 changed files with 10 additions and 2 deletions
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6
drivers/gpu/nvgpu/include/nvgpu/hw/ga100/hw_perf_ga100.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -67,6 +67,10 @@
#define perf_pmmsys_extent_v() (0x00267fffU) #define perf_pmmsys_extent_v() (0x00267fffU)
#define perf_pmmfbp_base_v() (0x00200000U) #define perf_pmmfbp_base_v() (0x00200000U)
#define perf_pmmfbp_extent_v() (0x00203fffU) #define perf_pmmfbp_extent_v() (0x00203fffU)
#define perf_pmmfbprouter_base_v() (0x00246000U)
#define perf_pmmfbprouter_extent_v() (0x002461ffU)
#define perf_pmmgpcrouter_base_v() (0x00244000U)
#define perf_pmmgpcrouter_extent_v() (0x002441ffU)
#define perf_pmasys_control_r() (0x0024a000U) #define perf_pmasys_control_r() (0x0024a000U)
#define perf_pmasys_channel_control_user_r(i)\ #define perf_pmasys_channel_control_user_r(i)\
(nvgpu_safe_add_u32(0x0024a620U, nvgpu_safe_mult_u32((i), 384U))) (nvgpu_safe_add_u32(0x0024a620U, nvgpu_safe_mult_u32((i), 384U)))

6
drivers/gpu/nvgpu/include/nvgpu/hw/ga10b/hw_perf_ga10b.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -67,6 +67,10 @@
#define perf_pmmsys_extent_v() (0x00263fffU) #define perf_pmmsys_extent_v() (0x00263fffU)
#define perf_pmmfbp_base_v() (0x00200000U) #define perf_pmmfbp_base_v() (0x00200000U)
#define perf_pmmfbp_extent_v() (0x00203fffU) #define perf_pmmfbp_extent_v() (0x00203fffU)
#define perf_pmmfbprouter_base_v() (0x00246000U)
#define perf_pmmfbprouter_extent_v() (0x002461ffU)
#define perf_pmmgpcrouter_base_v() (0x00244000U)
#define perf_pmmgpcrouter_extent_v() (0x002441ffU)
#define perf_pmasys_control_r() (0x0024a000U) #define perf_pmasys_control_r() (0x0024a000U)
#define perf_pmasys_channel_control_user_r(i)\ #define perf_pmasys_channel_control_user_r(i)\
(nvgpu_safe_add_u32(0x0024a620U, nvgpu_safe_mult_u32((i), 384U))) (nvgpu_safe_add_u32(0x0024a620U, nvgpu_safe_mult_u32((i), 384U)))