nvgpu: userspace: update tests to use mock-iospace library

Remove mocked IO space definitions from units like fifo and gr, instead get these from mock-iospace library. Jira: NVGPU-4520 Change-Id: I397e0bccdb4f744d9dd7fb57d2a2a504abcc618b Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2261826 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-12-22 17:36:20 +03:00 · 2019-12-13 15:54:29 +05:30
parent 9a89b94a68
commit 81720e81fa
10 changed files with 137 additions and 16802 deletions
--- a/userspace/Makefile
+++ b/userspace/Makefile
@@ -49,7 +49,8 @@ INCLUDES= 				\
 	-I$(NVGPU_SRC)/include		\
 	-I$(TWD)/../include		\
 	-I$(TWD)/../include/uapi	\
-	-I$(TWD)/include
+	-I$(TWD)/include		\
+	-I$(UNIT_SRC)/mock-iospace/include

 # This is safety build by default.
 NV_BUILD_CONFIGURATION_IS_SAFETY=1
--- a/userspace/units/Makefile.units.common.tmk
+++ b/userspace/units/Makefile.units.common.tmk
@@ -43,7 +43,8 @@ endif

 ifdef NVGPU_UNIT_INCLUDES
 NV_COMPONENT_INCLUDES 		:= \
-				$(NVGPU_UNIT_INCLUDES)
+				$(NVGPU_UNIT_INCLUDES) \
+				$(NV_SOURCE)/kernel/nvgpu/userspace/units/mock-iospace/include
 endif

 ifdef NVGPU_CFLAGS
@@ -69,7 +70,8 @@ endif

 ifdef NVGPU_UNIT_INTERFACE_DIRS
 NV_COMPONENT_NEEDED_INTERFACE_DIRS += \
-				$(NVGPU_UNIT_INTERFACE_DIRS)
+				$(NVGPU_UNIT_INTERFACE_DIRS) \
+				$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
 else
 NV_COMPONENT_NEEDED_INTERFACE_DIRS += \
                                $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
--- a/userspace/units/acr/nvgpu-acr.c
+++ b/userspace/units/acr/nvgpu-acr.c
@@ -45,7 +45,6 @@

 #include "nvgpu-acr.h"
 #include "../falcon/falcon_utf.h"
-#include "../gr/nvgpu-gr-gv11b-regs.h"
 #include "../gr/nvgpu-gr-gv11b.h"

 struct utf_falcon *pmu_flcn, *gpccs_flcn;
--- a/userspace/units/fifo/Makefile
+++ b/userspace/units/fifo/Makefile
@@ -23,5 +23,12 @@
 OBJS   = nvgpu-fifo.o nvgpu-fifo-gv11b.o

 MODULE = nvgpu-fifo
+LIB_PATHS += -lmock-iospace
+
+include ../Makefile.units
+
+lib$(MODULE).so: mock-iospace
+
+mock-iospace:
+	$(MAKE) -C ../mock-iospace/

-include ../Makefile.units
--- a/userspace/units/fifo/Makefile.tmk
+++ b/userspace/units/fifo/Makefile.tmk
@@ -17,6 +17,9 @@
 NVGPU_UNIT_NAME = nvgpu-fifo
 NVGPU_UNIT_SRCS = nvgpu-fifo.c nvgpu-fifo-gv11b.c

+NVGPU_UNIT_INTERFACE_DIRS := \
+			$(NV_SOURCE)/kernel/nvgpu/userspace/units/mock-iospace
+
 include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk

 # Local Variables:
--- a/userspace/units/fifo/nvgpu-fifo-gv11b.c
+++ b/userspace/units/fifo/nvgpu-fifo-gv11b.c
--- a/userspace/units/gr/Makefile
+++ b/userspace/units/gr/Makefile
@@ -23,5 +23,11 @@
 OBJS   = nvgpu-gr.o nvgpu-gr-gv11b.o

 MODULE = nvgpu-gr
+LIB_PATHS += -lmock-iospace

 include ../Makefile.units
+
+lib$(MODULE).so: mock-iospace
+
+mock-iospace:
+	$(MAKE) -C ../mock-iospace/
--- a/userspace/units/gr/Makefile.tmk
+++ b/userspace/units/gr/Makefile.tmk
@@ -17,6 +17,9 @@
 NVGPU_UNIT_NAME = nvgpu-gr
 NVGPU_UNIT_SRCS = nvgpu-gr.c nvgpu-gr-gv11b.c

+NVGPU_UNIT_INTERFACE_DIRS := \
+			$(NV_SOURCE)/kernel/nvgpu/userspace/units/mock-iospace
+
 include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk

 # Local Variables:
--- a/userspace/units/gr/nvgpu-gr-gv11b-regs.h
+++ b/userspace/units/gr/nvgpu-gr-gv11b-regs.h
--- a/userspace/units/gr/nvgpu-gr-gv11b.c
+++ b/userspace/units/gr/nvgpu-gr-gv11b.c
@@ -36,92 +36,74 @@
 #include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
 #include <nvgpu/hw/gv11b/hw_gr_gv11b.h>

+#include <gv11b_mock_regs.h>
+
 #include "nvgpu-gr-gv11b.h"
-#include "nvgpu-gr-gv11b-regs.h"

 struct gr_test_reg_info {
+	int idx;
 	u32 base;
 	u32 size;
+	const u32 *data;
 };

-#define gr_reg_arr_size(x, y) sizeof(x)/sizeof(y)
-
-struct gr_test_reg_info gr_reg_info[] = {
-	[0] = { /* NV_FBIO_REGSPACE */
+#define NUM_REG_SPACES 10U
+struct gr_test_reg_info  gr_gv11b_reg_space[NUM_REG_SPACES] = {
+	[0] = {
+		.idx = gv11b_master_reg_idx,
+		.base = 0x00000000,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[1] = {
+		.idx = gv11b_pri_reg_idx,
+		.base = 0x00120000,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[2] = {
+		.idx = gv11b_fuse_reg_idx,
+		.base = 0x00021000,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[3] = {
+		.idx = gv11b_top_reg_idx,
+		.base = 0x00022400,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[4] = {
+		.idx = gv11b_gr_reg_idx,
+		.base = 0x00400000,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[5] = {
+		.idx = gv11b_fifo_reg_idx,
+		.base = 0x2000,
+		.size = 0x0,
+		.data = NULL,
+	      },
+	[6] = { /* NV_FBIO_REGSPACE */
 		.base = 0x100800,
 		.size = 0x7FF,
+		.data = NULL,
 	      },
-	[1] = { /* NV_PLTCG_LTCS_REGSPACE */
+	[7] = { /* NV_PLTCG_LTCS_REGSPACE */
 		.base = 0x17E200,
 		.size = 0x100,
+		.data = NULL,
 	      },
-	[2] = { /* GPCCS_SWDX REGSPACE */
-		.base = 0x00418010,
-		.size = 0xFFF,
-	      },
-	[3] = { /* NV_PRI_GPCS_GCC_DBG REGSPACE */
-		.base = gr_pri_gpcs_gcc_dbg_r(),
-		.size = 0x60,
-	      },
-	[4] = { /* NV_PRI_GPCS_TPCS REGSPACE */
-		.base = gr_gpcs_tpcs_pe_vaf_r(),
-		.size = 0x9FF,
-	      },
-	[5] = { /* NV_PRI_GPCCS_PPCS_PES_VSC_VPC_REGSPACE */
-		.base = 0x41BE04,
-		.size = 0x1FF,
-	      },
-	[6] = { /* NV_PRI_GPCCS_GPC_BLOCK_REGS */
-		.base = 0x500300,
-		.size = 0x7FF,
-	      },
-	[7] = { /* PRI_GPCS_GPM REGS */
-		.base = 0x00500C10,
-		.size = 0x10,
-	      },
-	[8] = { /* NV_PRI_GPC0_GPC_L15_ECC_REGS */
-		.base = 0x501048,
-		.size = 0x10,
-	      },
-	[9] = { /* NV_PRI_GPCCS_FALCON_ECC_REGS */
-		.base = 0x502678,
-		.size = 0x10,
-	      },
-	[10] = { /* NV_PRI_GPCCS_GPC_EXCEPTION_REGS */
-		.base = 0x502c90,
-		.size = 0x10,
-	      },
-	[11] = { /* NV_PRI_GPCCS_PPC0_PES_REGSPACE */
-		.base = 0x503010,
-		.size = 0x2FFF,
-	      },
-	[12] = { /* NV_PFB_HSHUB_ACTIVE_LTCS REGSPACE */
+	[8] = { /* NV_PFB_HSHUB_ACTIVE_LTCS REGSPACE */
 		.base = 0x1FBC20,
 		.size = 0x4,
+		.data = NULL,
 	      },
-	[13] = { /* NV_PFIFO_INTR_EN REGSPACE */
-		.base = 0x2140,
-		.size = 0x4,
-	      },
-	[14] = { /* NV_PFIFO_SCHED REGSPACE */
-		.base = 0x2630,
-		.size = 0x10,
-	      },
-	[15] = { /* NV_PFIFO_INTR_CTXSW REGSPACE */
-		.base = 0x2a30,
-		.size = 0x4,
-	      },
-	[16] = { /* NV_PRI_GPCS_SWDX_DSS_DEBUG REGSPACE */
-		.base = 0x418000,
-		.size = 0xc,
-	      },
-	[17] = { /* NV_PRI_EGPCS_ETPCS_SM_DSM REGSPACE */
-		.base = 0x481a00,
-		.size = 0x5FF,
-	      },
-	[18] = { /* NV_PCCSR_CHANNEL REGSPACE */
+	[9] = { /* NV_PCCSR_CHANNEL REGSPACE */
 		.base = 0x800004,
 		.size = 0x1F,
+		.data = NULL,
 	      },
 };

@@ -170,29 +152,39 @@ static struct nvgpu_posix_io_callbacks gr_test_reg_callbacks = {
 	.tegra_fuse_readl = tegra_fuse_readl_access_reg_fn,
 };

-static void gr_io_delete_initialized_reg_space(struct unit_module *m, struct gk20a *g)
+static void gr_io_delete_reg_space(struct unit_module *m, struct gk20a *g)
 {
 	u32 i = 0;
-	u32 arr_size = gr_array_reg_space(gr_gv11b_initialized_reg_space);

-	for (i = 0; i < arr_size; i++) {
-		u32 base = gr_gv11b_initialized_reg_space[i].base;
+	for (i = 0; i < NUM_REG_SPACES; i++) {
+		u32 base = gr_gv11b_reg_space[i].base;
 		nvgpu_posix_io_delete_reg_space(g, base);
 	}
 }

-static int gr_io_add_initialized_reg_space(struct unit_module *m, struct gk20a *g)
+static int gr_io_add_reg_space(struct unit_module *m, struct gk20a *g)
 {
 	int ret = UNIT_SUCCESS;
-	u32 arr_size = gr_array_reg_space(gr_gv11b_initialized_reg_space);
 	u32 i = 0, j = 0;
 	u32 base, size;
 	struct nvgpu_posix_io_reg_space *gr_io_reg;

-	for (i = 0; i < arr_size; i++) {
-		base = gr_gv11b_initialized_reg_space[i].base;
-		size = gr_gv11b_initialized_reg_space[i].size;
+	for (i = 0; i < NUM_REG_SPACES; i++) {
+		base = gr_gv11b_reg_space[i].base;
+		size = gr_gv11b_reg_space[i].size;
+		if (size == 0) {
+			struct mock_iospace iospace = {0};

+			ret = gv11b_get_mock_iospace(gr_gv11b_reg_space[i].idx,
+					&iospace);
+			if (ret != 0) {
+				unit_err(m, "failed to get reg space for %08x\n",
+						base);
+				goto clean_init_reg_space;
+			}
+			gr_gv11b_reg_space[i].data = iospace.data;
+			gr_gv11b_reg_space[i].size = size = iospace.size;
+		}
 		if (nvgpu_posix_io_add_reg_space(g, base, size) != 0) {
 			unit_err(m, "failed to add reg space for %08x\n", base);
 			ret = UNIT_FAIL;
@@ -206,65 +198,40 @@ static int gr_io_add_initialized_reg_space(struct unit_module *m, struct gk20a *
 			goto clean_init_reg_space;
 		}

-		memcpy(gr_io_reg->data, gr_gv11b_initialized_reg_space[i].data, size);
+		if (gr_gv11b_reg_space[i].data != NULL) {
+			memcpy(gr_io_reg->data, gr_gv11b_reg_space[i].data, size);
+		} else {
+			memset(gr_io_reg->data, 0, size);
+		}
 	}

 	return ret;

 clean_init_reg_space:
 	for (j = 0; j < i; j++) {
-		base = gr_gv11b_initialized_reg_space[j].base;
+		base = gr_gv11b_reg_space[j].base;
 		nvgpu_posix_io_delete_reg_space(g, base);
 	}

 	return ret;
 }

-static void test_gr_clean_gv11b_io_reg_space(struct unit_module *m, struct gk20a *g, u32 arr_index)
-{
-	u32 j = 0, base;
-
-	for (j = 0; j < arr_index; j++) {
-		base = gr_reg_info[j].base;
-		nvgpu_posix_io_delete_reg_space(g, base);
-	}
-}
-
 int test_gr_setup_gv11b_reg_space(struct unit_module *m, struct gk20a *g)
 {
-	u32 i = 0;
-	u32 arr_size = gr_reg_arr_size(gr_reg_info, struct gr_test_reg_info);
-
 	/* Create register space */
 	nvgpu_posix_io_init_reg_space(g);

-	if (gr_io_add_initialized_reg_space(m, g) == UNIT_FAIL) {
+	if (gr_io_add_reg_space(m, g) == UNIT_FAIL) {
 		unit_err(m, "failed to get initialized reg space\n");
 		return UNIT_FAIL;
 	}

-	for (i = 0; i < arr_size; i++) {
-		if (nvgpu_posix_io_add_reg_space(g,
-			gr_reg_info[i].base, gr_reg_info[i].size) != 0) {
-			unit_err(m, "io add reg space failed!\n");
-			goto clean_up_io_reg_space;
-		}
-	}
-
 	(void)nvgpu_posix_register_io(g, &gr_test_reg_callbacks);

 	return 0;
-
-clean_up_io_reg_space:
-	test_gr_clean_gv11b_io_reg_space(m, g, i);
-	return -ENOMEM;
 }

-
 void test_gr_cleanup_gv11b_reg_space(struct unit_module *m, struct gk20a *g)
 {
-	u32 arr_size = gr_reg_arr_size(gr_reg_info, struct gr_test_reg_info);
-
-	gr_io_delete_initialized_reg_space(m, g);
-	test_gr_clean_gv11b_io_reg_space(m, g, arr_size);
+	gr_io_delete_reg_space(m, g);
 }