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gpu: nvgpu: Remove gk20a support
Remove gk20a support. Leave only gk20a code which is reused by other GPUs. JIRA NVGPU-38 Change-Id: I3d5f2bc9f71cd9f161e64436561a5eadd5786a3b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master/r/1507927 GVS: Gerrit_Virtual_Submit
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Terje Bergstrom
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@@ -234,8 +234,6 @@ done:
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static struct of_device_id tegra_gk20a_of_match[] = {
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#ifdef CONFIG_TEGRA_GK20A
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{ .compatible = "nvidia,tegra124-gk20a",
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.data = &gk20a_tegra_platform },
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{ .compatible = "nvidia,tegra210-gm20b",
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.data = &gm20b_tegra_platform },
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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@@ -254,25 +252,8 @@ static struct of_device_id tegra_gk20a_of_match[] = {
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{ .compatible = "nvidia,tegra124-gk20a-vgpu",
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.data = &vgpu_tegra_platform },
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#endif
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#else
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{ .compatible = "nvidia,tegra124-gk20a",
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.data = &gk20a_generic_platform },
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{ .compatible = "nvidia,tegra210-gm20b",
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.data = &gk20a_generic_platform },
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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{ .compatible = TEGRA_18x_GPU_COMPAT_TEGRA,
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.data = &gk20a_generic_platform },
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#endif
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#endif
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{ .compatible = "nvidia,generic-gk20a",
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.data = &gk20a_generic_platform },
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{ .compatible = "nvidia,generic-gm20b",
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.data = &gk20a_generic_platform },
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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{ .compatible = "nvidia,generic-gp10b",
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.data = &gk20a_generic_platform },
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#endif
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{ },
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};
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@@ -47,7 +47,6 @@
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#include <nvgpu/linux/dma.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/hal_gk20a.h"
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#include "gk20a/platform_gk20a.h"
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#include "gk20a/gk20a_scale.h"
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#include "gm20b/clk_gm20b.h"
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@@ -231,66 +230,6 @@ static unsigned long gk20a_tegra_get_emc_rate(struct gk20a *g,
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return MHZ_TO_HZ(emc_rate);
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}
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/*
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* gk20a_tegra_postscale(profile, freq)
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*
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* This function sets emc frequency based on current gpu frequency
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*/
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static void gk20a_tegra_postscale(struct device *dev,
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unsigned long freq)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct gk20a_scale_profile *profile = platform->g->scale_profile;
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struct gk20a_emc_params *emc_params = profile->private_data;
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struct gk20a *g = get_gk20a(dev);
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struct clk *emc_clk = platform->clk[2];
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enum tegra_chipid chip_id = tegra_get_chip_id();
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unsigned long emc_target;
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unsigned long emc_freq_lower, emc_freq_upper, emc_freq_rounded;
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emc_target = gk20a_tegra_get_emc_rate(g, emc_params);
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switch (chip_id) {
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case TEGRA124:
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case TEGRA132:
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/* T124 and T132 don't apply any rounding. The resulting
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* emc frequency gets implicitly rounded up after issuing
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* the clock_set_request.
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* So explicitly round up the emc target here to achieve
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* the same outcome. */
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emc_freq_rounded =
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tegra_emc_round_rate_updown(emc_target, true);
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break;
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case TEGRA210:
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emc_freq_lower = (unsigned long)
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tegra_emc_round_rate_updown(emc_target, false);
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emc_freq_upper = (unsigned long)
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tegra_emc_round_rate_updown(emc_target, true);
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/* round to the nearest frequency step */
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if (emc_target < (emc_freq_lower + emc_freq_upper) / 2)
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emc_freq_rounded = emc_freq_lower;
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else
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emc_freq_rounded = emc_freq_upper;
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break;
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default:
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/* a proper rounding function needs to be implemented
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* for emc in t18x */
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emc_freq_rounded = clk_round_rate(emc_clk, emc_target);
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break;
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}
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/* only change the emc clock if new rounded frequency is different
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* from previously set emc rate */
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if (emc_freq_rounded != emc_params->freq_last_set) {
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clk_set_rate(emc_clk, emc_freq_rounded);
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emc_params->freq_last_set = emc_freq_rounded;
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}
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}
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/*
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* gk20a_tegra_prescale(profile, freq)
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*
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@@ -619,30 +558,6 @@ err_get_clock:
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return ret;
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}
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static int gk20a_tegra_reset_assert(struct device *dev)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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if (!platform->clk_reset)
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platform->clk_reset = platform->clk[0];
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tegra_periph_reset_assert(platform->clk_reset);
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return 0;
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}
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static int gk20a_tegra_reset_deassert(struct device *dev)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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if (!platform->clk_reset)
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return -EINVAL;
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tegra_periph_reset_deassert(platform->clk_reset);
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return 0;
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}
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#if defined(CONFIG_RESET_CONTROLLER) && defined(CONFIG_COMMON_CLK)
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static int gm20b_tegra_reset_assert(struct device *dev)
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{
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@@ -992,54 +907,6 @@ static int gk20a_clk_get_freqs(struct device *dev,
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}
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#endif
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struct gk20a_platform gk20a_tegra_platform = {
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.has_syncpoints = true,
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.aggressive_sync_destroy_thresh = 64,
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/* power management configuration */
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.railgate_delay_init = 500,
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.can_railgate_init = true,
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.can_elpg_init = true,
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.enable_slcg = true,
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.enable_blcg = true,
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.enable_elcg = true,
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.enable_elpg = true,
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.enable_aelpg = true,
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.ptimer_src_freq = 12000000,
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.force_reset_in_do_idle = false,
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.default_big_page_size = SZ_128K,
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.ch_wdt_timeout_ms = 7000,
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.probe = gk20a_tegra_probe,
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.late_probe = gk20a_tegra_late_probe,
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.remove = gk20a_tegra_remove,
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/* power management callbacks */
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.suspend = gk20a_tegra_suspend,
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.busy = gk20a_tegra_busy,
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.idle = gk20a_tegra_idle,
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.reset_assert = gk20a_tegra_reset_assert,
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.reset_deassert = gk20a_tegra_reset_deassert,
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/* frequency scaling configuration */
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.prescale = gk20a_tegra_prescale,
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.postscale = gk20a_tegra_postscale,
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.devfreq_governor = "nvhost_podgov",
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.qos_notify = gk20a_scale_qos_notify,
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.dump_platform_dependencies = gk20a_tegra_debug_dump,
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.soc_name = "tegra12x",
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.unified_memory = true,
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};
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struct gk20a_platform gm20b_tegra_platform = {
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.has_syncpoints = true,
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.aggressive_sync_destroy_thresh = 64,
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@@ -1097,8 +964,6 @@ struct gk20a_platform gm20b_tegra_platform = {
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.prescale = gk20a_tegra_prescale,
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#ifdef CONFIG_TEGRA_BWMGR
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.postscale = gm20b_tegra_postscale,
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#else
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.postscale = gk20a_tegra_postscale,
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#endif
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.devfreq_governor = "nvhost_podgov",
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.qos_notify = gk20a_scale_qos_notify,
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