From 82ed6cbec804520ff099cf0d7f5432d0a23536b9 Mon Sep 17 00:00:00 2001 From: Seeta Rama Raju Date: Thu, 19 Nov 2020 15:53:12 +0530 Subject: [PATCH] gpu: nvgpu: Fix for MISRA 8.6 violation - MISRA scan reports violation that these functions are declared but never defined. - Here function definitions are under conditional compilation but not function declaration. So keeping these declarations under conditional comilation. JIRA NVGPU-6053 Change-Id: Ic5fcdd321276cfadcff103cd46c31903fd236e7e Signed-off-by: Seeta Rama Raju Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2448753 (cherry picked from commit 9ce8fbd39fc12c709295cef0e7ecddaf2bea4e31) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2449718 Tested-by: mobile promotions Reviewed-by: automaticguardword Reviewed-by: Vaibhav Kachore Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h | 3 +++ drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.h | 5 ++--- drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h | 8 ++++---- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h index e4dd40a7c..a3d5c8b57 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h @@ -57,8 +57,11 @@ void gm20b_gr_init_fe_go_idle_timeout(struct gk20a *g, bool enable); void gm20b_gr_init_pipe_mode_override(struct gk20a *g, bool enable); void gm20b_gr_init_load_method_init(struct gk20a *g, struct netlist_av_list *sw_method_init); + +#ifndef CONFIG_NVGPU_GR_GOLDEN_CTX_VERIFICATION int gm20b_gr_init_load_sw_bundle_init(struct gk20a *g, struct netlist_av_list *sw_bundle_init); +#endif u32 gm20b_gr_init_get_global_ctx_cb_buffer_size(struct gk20a *g); u32 gm20b_gr_init_get_global_ctx_pagepool_buffer_size(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.h b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.h index 44109b9da..4e358e120 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.h +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.h @@ -42,9 +42,6 @@ void gp10b_gr_init_commit_global_cb_manager(struct gk20a *g, struct nvgpu_gr_config *config, struct nvgpu_gr_ctx *gr_ctx, bool patch); -u32 gp10b_gr_init_get_ctx_attrib_cb_size(struct gk20a *g, u32 betacb_size, - u32 tpc_count, u32 max_tpc); - void gp10b_gr_init_get_supported_preemption_modes( u32 *graphics_preemption_mode_flags, u32 *compute_preemption_mode_flags); void gp10b_gr_init_get_default_preemption_modes( @@ -77,6 +74,8 @@ void gp10b_gr_init_commit_cbes_reserve(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx, bool patch); #ifdef CONFIG_NVGPU_GRAPHICS +u32 gp10b_gr_init_get_ctx_attrib_cb_size(struct gk20a *g, u32 betacb_size, + u32 tpc_count, u32 max_tpc); u32 gp10b_gr_init_get_attrib_cb_gfxp_default_size(struct gk20a *g); u32 gp10b_gr_init_get_attrib_cb_gfxp_size(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h index 9d696e0f0..c7e4a5b53 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h @@ -55,7 +55,7 @@ int gv11b_gr_init_sm_id_config(struct gk20a *g, u32 *tpc_sm_id, bool patch); void gv11b_gr_init_tpc_mask(struct gk20a *g, u32 gpc_index, u32 pes_tpc_mask); void gv11b_gr_init_fs_state(struct gk20a *g); -int gv11b_gr_init_preemption_state(struct gk20a *g); + void gv11b_gr_init_commit_global_timeslice(struct gk20a *g); u32 gv11b_gr_init_get_bundle_cb_default_size(struct gk20a *g); @@ -83,15 +83,15 @@ int gv11b_gr_init_commit_sm_id_programming(struct gk20a *g, int gv11b_gr_init_load_sw_veid_bundle(struct gk20a *g, struct netlist_av_list *sw_veid_bundle_init); -void gv11b_gr_init_commit_cbes_reserve(struct gk20a *g, - struct nvgpu_gr_ctx *gr_ctx, bool patch); - u32 gv11b_gr_init_get_max_subctx_count(void); u32 gv11b_gr_init_get_patch_slots(struct gk20a *g, struct nvgpu_gr_config *config); void gv11b_gr_init_detect_sm_arch(struct gk20a *g); #ifdef CONFIG_NVGPU_GRAPHICS +int gv11b_gr_init_preemption_state(struct gk20a *g); +void gv11b_gr_init_commit_cbes_reserve(struct gk20a *g, + struct nvgpu_gr_ctx *gr_ctx, bool patch); void gv11b_gr_init_rop_mapping(struct gk20a *g, struct nvgpu_gr_config *gr_config);