From 83691e088fb0cb0aaa05052dfd1a0d96b9f47108 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Mon, 7 Sep 2020 14:52:41 +0530 Subject: [PATCH] gpu: nvgpu: initialize ctx state for each GR instance Execute nvgpu_gr_init_ctx_state() for each GR instance. Move it under gr_init_ctxsw_falcon_support() which is already executed for each instance. Update the API to accept struct nvgpu_gr pointer for convenience. API does not need to know about other instances. For reset path, continue using g->gr instead of specific instance. This will be revisited when entire reset path is refactored. Jira NVGPU-5648 Change-Id: I8879bf3b44bb01f6b8053f1aecbd550f49837520 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2409535 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Antony Clince Alex Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/gr.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/gr.c b/drivers/gpu/nvgpu/common/gr/gr.c index df62182d3..721fca46f 100644 --- a/drivers/gpu/nvgpu/common/gr/gr.c +++ b/drivers/gpu/nvgpu/common/gr/gr.c @@ -402,12 +402,12 @@ static int gr_init_config(struct gk20a *g) return 0; } -static int nvgpu_gr_init_ctx_state(struct gk20a *g) +static int nvgpu_gr_init_ctx_state(struct gk20a *g, struct nvgpu_gr *gr) { int err = 0; /* Initialize ctx state during boot and recovery */ - err = nvgpu_gr_falcon_init_ctx_state(g, g->gr->falcon); + err = nvgpu_gr_falcon_init_ctx_state(g, gr->falcon); if (err != 0) { nvgpu_err(g, "gr ctx_state init failed"); } @@ -716,9 +716,12 @@ int nvgpu_gr_reset(struct gk20a *g) nvgpu_mutex_release(fecs_mutex); - /* this appears query for sw states but fecs actually init - ramchain, etc so this is hw init */ - err = nvgpu_gr_init_ctx_state(g); + /* + * This appears query for sw states but fecs actually inits + * ramchain, etc so this is hw init. Hence should be executed + * for every GR engine HW initialization. + */ + err = nvgpu_gr_init_ctx_state(g, g->gr); if (err != 0) { return err; } @@ -771,6 +774,16 @@ static int gr_init_ctxsw_falcon_support(struct gk20a *g) return err; } + /* + * This appears query for sw states but fecs actually inits + * ramchain, etc so this is hw init. Hence should be executed + * for every GR engine HW initialization. + */ + err = nvgpu_gr_init_ctx_state(g, gr); + if (err != 0) { + return err; + } + return 0; } @@ -808,13 +821,6 @@ int nvgpu_gr_init_support(struct gk20a *g) return err; } - /* this appears query for sw states but fecs actually init - ramchain, etc so this is hw init */ - err = nvgpu_gr_init_ctx_state(g); - if (err != 0) { - return err; - } - #ifdef CONFIG_NVGPU_POWER_PG if (g->can_elpg) { err = nvgpu_gr_falcon_bind_fecs_elpg(g);