gpu: nvgpu: unit: common.fbp tests

Add unit tests for all the APIs exposed by common.fbp unit.

JIRA NVGPU-4393

Change-Id: I4aef64359919418ee5446925331fa9ef9eb5d5f0
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2244373
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

Makefile.umbrella.tmk

@@ -66,6 +66,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/mm/mm
 NV_REPOSITORY_COMPONENTS += userspace/units/mm/page_table_faults
 NV_REPOSITORY_COMPONENTS += userspace/units/mm/vm
 NV_REPOSITORY_COMPONENTS += userspace/units/netlist
+NV_REPOSITORY_COMPONENTS += userspace/units/fbp
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel/gk20a

drivers/gpu/nvgpu/libnvgpu-drv_safe.export

@@ -38,6 +38,7 @@ gm20b_top_get_max_fbps_count
 gm20b_top_get_max_ltc_per_fbp
 gm20b_top_get_max_lts_per_ltc
 gm20b_top_get_num_ltcs
+gm20b_fuse_status_opt_fbp
 gp10b_get_max_page_table_levels
 gp10b_mm_get_default_big_page_size
 gp10b_mm_get_iommu_bit
@@ -275,6 +276,10 @@ nvgpu_falcon_sw_free
 nvgpu_falcon_sw_init
 nvgpu_falcon_wait_for_halt
 nvgpu_falcon_wait_idle
+nvgpu_fbp_init_support
+nvgpu_fbp_get_max_fbps_count
+nvgpu_fbp_get_fbp_en_mask
+nvgpu_fbp_remove_support
 nvgpu_fifo_init_support
 nvgpu_finalize_poweron
 nvgpu_free

userspace/Makefile.sources

@@ -74,6 +74,7 @@ UNITS :=				\
 	$(UNIT_SRC)/mm/nvgpu_mem	\
 	$(UNIT_SRC)/mm/vm		\
 	$(UNIT_SRC)/netlist		\
+	$(UNIT_SRC)/fbp		\
 	$(UNIT_SRC)/fifo		\
 	$(UNIT_SRC)/fifo/channel	\
 	$(UNIT_SRC)/fifo/channel/gk20a	\

userspace/SWUTS.h

@@ -58,6 +58,7 @@
  *   - @ref SWUTS-mm-nvgpu-sgt
  *   - @ref SWUTS-mm-mm
  *   - @ref SWUTS-mm-vm
+ *   - @ref SWUTS-fbp
  *   - @ref SWUTS-fuse
  *   - @ref SWUTS-posix-bitops
  *   - @ref SWUTS-posix-cond

userspace/SWUTS.sources

@@ -6,7 +6,7 @@ INPUT += ../../../userspace/units/interface/lock/lock.h
 INPUT += ../../../userspace/units/interface/rbtree/rbtree.h
 INPUT += ../../../userspace/units/falcon/falcon_tests/nvgpu-falcon.h
 INPUT += ../../../userspace/units/netlist/nvgpu-netlist.h
-INPUT += ../../../userspace/units/fifo/nvgpu-fifo.h
+INPUT += ../../../userspace/units/fbp/nvgpu-fbp.h
 INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel.h
 INPUT += ../../../userspace/units/fifo/channel/gk20a/nvgpu-channel-gk20a.h
 INPUT += ../../../userspace/units/fifo/channel/gm20b/nvgpu-channel-gm20b.h

userspace/required_tests.json

@@ -444,6 +444,26 @@
         "test_level": 0,
         "unit": "falcon"
     },
+    {
+        "test": "fbp_setup",
+        "test_level": 0,
+        "unit": "fbp"
+    },
+    {
+        "test": "fbp_init_and_query",
+        "test_level": 0,
+        "unit": "fbp"
+    },
+    {
+        "test": "fbp_remove_support",
+        "test_level": 0,
+        "unit": "fbp"
+    },
+    {
+        "test": "fbp_free_reg_space",
+        "test_level": 0,
+        "unit": "fbp"
+    },
     {
         "test": "cache_default",
         "test_level": 0,

userspace/units/fbp/Makefile

@@ -0,0 +1,26 @@
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+.SUFFIXES:
+
+OBJS   = nvgpu-fbp.o
+MODULE = fbp
+
+include ../Makefile.units

userspace/units/fbp/Makefile.interface.tmk

@@ -0,0 +1,23 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=fbp
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.interface.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/fbp/Makefile.tmk

@@ -0,0 +1,24 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=fbp
+NVGPU_UNIT_SRCS=nvgpu-fbp.c
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/fbp/nvgpu-fbp.c

@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <unit/unit.h>
+#include <unit/io.h>
+#include <nvgpu/posix/io.h>
+#include <nvgpu/posix/posix-fault-injection.h>
+
+#include <nvgpu/gk20a.h>
+#include <nvgpu/fbp.h>
+
+#include <hal/top/top_gm20b.h>
+#include <hal/fuse/fuse_gm20b.h>
+
+#include <nvgpu/hw/gv11b/hw_top_gv11b.h>
+#include <nvgpu/hw/gv11b/hw_fuse_gv11b.h>
+#include "nvgpu-fbp.h"
+
+/*
+ * Write callback.
+ */
+static void writel_access_reg_fn(struct gk20a *g,
+					struct nvgpu_reg_access *access)
+{
+	nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
+}
+
+/*
+ * Read callback.
+ */
+static void readl_access_reg_fn(struct gk20a *g,
+				struct nvgpu_reg_access *access)
+{
+	access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
+}
+
+static struct nvgpu_posix_io_callbacks test_reg_callbacks = {
+	/* Write APIs all can use the same accessor. */
+	.writel          = writel_access_reg_fn,
+	.writel_check    = writel_access_reg_fn,
+	.bar1_writel     = writel_access_reg_fn,
+	.usermode_writel = writel_access_reg_fn,
+
+	/* Likewise for the read APIs. */
+	.__readl         = readl_access_reg_fn,
+	.readl           = readl_access_reg_fn,
+	.bar1_readl      = readl_access_reg_fn,
+};
+
+int test_setup(struct unit_module *m, struct gk20a *g, void *args)
+{
+	/* Init HAL */
+	g->ops.top.get_max_fbps_count = gm20b_top_get_max_fbps_count;
+	g->ops.fuse.fuse_status_opt_fbp = gm20b_fuse_status_opt_fbp;
+
+	/* Init register space */
+	nvgpu_posix_io_init_reg_space(g);
+
+	/* Map register space for FUSE_STATUS_OPT_FBP */
+	if (nvgpu_posix_io_add_reg_space(g, fuse_status_opt_fbp_r(), 0x4)
+									!= 0) {
+		unit_err(m, "%s: failed to register NV_FUSE space\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	/* Map register space for TOP_SCAL_NUM_FBPS */
+	if (nvgpu_posix_io_add_reg_space(g, top_num_fbps_r(), 0x4) != 0) {
+		unit_err(m, "%s: failed to register NV_TOP space\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	(void)nvgpu_posix_register_io(g, &test_reg_callbacks);
+
+	return UNIT_SUCCESS;
+}
+
+int test_free_reg_space(struct unit_module *m, struct gk20a *g, void *args)
+{
+	/* Free register space */
+	nvgpu_posix_io_delete_reg_space(g, fuse_status_opt_fbp_r());
+	nvgpu_posix_io_delete_reg_space(g, top_num_fbps_r());
+
+	return UNIT_SUCCESS;
+}
+
+int test_fbp_init_and_query(struct unit_module *m, struct gk20a *g,
+								void *args)
+{
+	int ret = UNIT_SUCCESS;
+	int val = 0;
+	u32 fbp_en_mask;
+	u32 max_fbps_count;
+	struct nvgpu_fbp *fbp = g->fbp;
+	struct nvgpu_posix_fault_inj *kmem_fi =
+					nvgpu_kmem_get_fault_injection();
+
+	/* First, cover the memory allocation failure path. */
+	nvgpu_posix_enable_fault_injection(kmem_fi, true, 0);
+
+	/* Call fbp_init_support and confirm it returns -ENOMEM. */
+	val = nvgpu_fbp_init_support(g);
+	if (val != -ENOMEM) {
+		unit_err(m,
+		"%s: fbp_init_support did not fail due to memory allocation.\n",
+		 __func__);
+		return UNIT_FAIL;
+	}
+	nvgpu_posix_enable_fault_injection(kmem_fi, false, 0);
+
+	/* Initialize the FBP floorsweeping status in fuse to 0xE1. */
+	fbp_en_mask = 0xE1U;
+	nvgpu_posix_io_writel_reg_space(g, fuse_status_opt_fbp_r(),
+								fbp_en_mask);
+
+	/* Initialize the  maximum number of FBPs to 8. */
+	max_fbps_count = 8U;
+	nvgpu_posix_io_writel_reg_space(g, top_num_fbps_r(), max_fbps_count);
+
+	/* Call fbp_init_support to initialize g->fbp */
+	val = nvgpu_fbp_init_support(g);
+	if (val != 0) {
+		unit_err(m, "%s: Failed to initialize g->fbp.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	fbp = g->fbp;
+
+	/* Check if the max_fbps_count is read correctly. */
+	max_fbps_count = nvgpu_fbp_get_max_fbps_count(fbp);
+	if (max_fbps_count != 8U) {
+		unit_err(m, "%s: fbp->max_fbps_count is incorrect.\n",
+								__func__);
+		return UNIT_FAIL;
+	}
+
+	/* Check if the FBP en_mask is calculated correctly.
+	 * Note: 0:enable and 1:disable in value read from fuse.
+	 * so we've to flip the bits and also set unused bits to zero.
+	 */
+	fbp_en_mask = nvgpu_fbp_get_fbp_en_mask(fbp);
+	if (fbp_en_mask != 0x1EU) {
+		unit_err(m, "%s: fbp->fbp_en_mask is incorrect.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	/* Initialize the FBP floorsweeping status in fuse to 5.
+	 * Use different value than above to check if init occurs once.
+	 */
+	max_fbps_count = 5U;
+	nvgpu_posix_io_writel_reg_space(g, top_num_fbps_r(), max_fbps_count);
+
+	/* Call fbp_init_support again to ensure the initialization is
+	 * done once.
+	 */
+	val = nvgpu_fbp_init_support(g);
+	if (val != 0) {
+		unit_err(m, "%s: Failed to initialize g->fbp.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	/* Check if the max_fbps_count is NOT set to 5. */
+	max_fbps_count = nvgpu_fbp_get_max_fbps_count(fbp);
+	if (max_fbps_count == 5U) {
+		unit_err(m, "%s: g->fbp initialized again.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	return ret;
+}
+
+int test_fbp_remove_support(struct unit_module *m, struct gk20a *g, void *args)
+{
+	int ret = UNIT_SUCCESS;
+
+	/* Confirm if g->fbp != NULL before calling fbp_remov_support API. */
+	if (g->fbp == NULL) {
+		unit_err(m, "%s: g->fbp is uninitialized.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	/* Call fbp_remove_support to cleanup the saved FBP data */
+	nvgpu_fbp_remove_support(g);
+
+	/* Confirm if g->fbp == NULL after cleanup. */
+	if (g->fbp != NULL) {
+		unit_err(m, "%s: g->fbp is not cleaned up.\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	return ret;
+}
+struct unit_module_test fbp_tests[] = {
+	UNIT_TEST(fbp_setup,	          test_setup,                NULL, 0),
+	UNIT_TEST(fbp_init_and_query,	  test_fbp_init_and_query,   NULL, 0),
+	UNIT_TEST(fbp_remove_support,	  test_fbp_remove_support,   NULL, 0),
+	UNIT_TEST(fbp_free_reg_space,	  test_free_reg_space,	     NULL, 0),
+};
+
+UNIT_MODULE(fbp, fbp_tests, UNIT_PRIO_NVGPU_TEST);

userspace/units/fbp/nvgpu-fbp.h

@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef UNIT_NVGPU_FBP_H
+#define UNIT_NVGPU_FBP_H
+
+struct gk20a;
+struct unit_module;
+
+/** @addtogroup SWUTS-fbp
+ *  @{
+ *
+ * Software Unit Test Specification for nvgpu.common.fbp
+ */
+
+/**
+ * Test specification for: test_setup
+ *
+ * Description: Setup prerequisites for tests.
+ *
+ * Test Type: Other (setup)
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize HAL function pointers.
+ * - Map the register space for NV_TOP and NV_FUSE.
+ * - Register read/write callback functions.
+ *
+ * Output:
+ * - UNIT_FAIL if encounters an error creating register space;
+ * - UNIT_SUCCESS otherwise
+ */
+int test_setup(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_free_reg_space
+ *
+ * Description: Free resources from test_setup()
+ *
+ * Test Type: Other (setup)
+ *
+ * Input: test_setup() has been executed.
+ *
+ * Steps:
+ * - Free up NV_TOP and NV_FUSE register space.
+ *
+ * Output:
+ * - UNIT_SUCCESS
+ */
+int test_free_reg_space(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_fbp_init_and_query
+ *
+ * Description: Verify the FBP init and config query APIs exposed by common.fbp.
+ *
+ * Test Type: Feature Based
+ *
+ * Targets: nvgpu_fbp_init_support, nvgpu_fbp_get_max_fbps_count, nvgpu_fbp_get_fbp_en_mask
+ *
+ * Input: test_setup() has been executed.
+ *
+ * Steps:
+ * - Initialize the FBP floorsweeping status in fuse to 0xE1 by writing to fuse
+ *   register fuse_status_opt_fbp_r().
+ * - Initialize the  maximum number of FBPs to 8 by writing to Top register
+ *   top_num_fbps_r().
+ * - Call nvgpu_fbp_init_support to initialize g->fbp.
+ * - Read the g->fbp->max_fbp_count using nvgpu_fbp_get_max_fbps_count().
+ * - Check if the max_fbps_count is initialized and read back correctly.
+ * - Read the g->fbp->fbp_en_mask using nvgpu_fbp_get_fbp_en_mask().
+ * - Check if the FBP en_mask is calculated correctly and read back right too.
+ * - Initialize the FBP floorsweeping status in fuse to 5(Use different value
+ *   than before to check if init occurs once.
+ * - Call fbp_init_support again to ensure the initialization is done once.
+ * - Check if the max_fbps_count is NOT set to new value(5).
+ *
+ * Output:
+ * - UNIT_FAIL if above API fails to init g->fbp or read back values from g->fbp
+ * - UNIT_SUCCESS otherwise
+ */
+int test_fbp_init_and_query(struct unit_module *m, struct gk20a *g, void *args);
+
+
+/**
+ * Test specification for: test_fbp_remove_support
+ *
+ * Description: Verify the nvgpu_fbp_remove_support exposed by common.fbp.
+ *
+ * Test Type: Feature Based
+ *
+ * Targets: nvgpu_fbp_remove_support
+ *
+ * Input: test_fbp_init_and_query() has been executed.
+ *
+ * Steps:
+ * - Confirm if g->fbp != NULL before calling fbp_remov_support API.
+ * - Call fbp_remove_support to cleanup the saved FBP data.
+ * - Confirm if g->fbp == NULL after cleanup.
+ *
+ * Output:
+ * - UNIT_FAIL if above API fails to cleanup g->fbp;
+ * - UNIT_SUCCESS otherwise
+ */
+int test_fbp_remove_support(struct unit_module *m, struct gk20a *g, void *args);
+#endif /* UNIT_NVGPU_FBP_H */