diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index 0c8bff438..f59478287 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c @@ -971,6 +971,26 @@ fail: return err; } +static u32 nvgpu_obj_ctx_user_flags_to_common_flags(u32 user_flags) +{ + u32 flags = 0; + + if (user_flags & NVGPU_ALLOC_OBJ_FLAGS_GFXP) + flags |= NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP; + + if (user_flags & NVGPU_ALLOC_OBJ_FLAGS_CILP) + flags |= NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP; + + return flags; +} + +static int nvgpu_ioctl_channel_alloc_obj_ctx(struct channel_gk20a *ch, + u32 class_num, u32 user_flags) +{ + return ch->g->ops.gr.alloc_obj_ctx(ch, class_num, + nvgpu_obj_ctx_user_flags_to_common_flags(user_flags)); +} + long gk20a_channel_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) { @@ -1024,7 +1044,7 @@ long gk20a_channel_ioctl(struct file *filp, __func__, cmd); break; } - err = ch->g->ops.gr.alloc_obj_ctx(ch, args->class_num, args->flags); + err = nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num, args->flags); gk20a_idle(ch->g); break; } diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 58a8aa970..d865849b4 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h @@ -52,6 +52,10 @@ struct fifo_profile_gk20a; #define NVGPU_GPFIFO_FLAGS_SUPPORT_VPR (1 << 0) #define NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC (1 << 1) +/* Flags to be passed to g->ops.gr.alloc_obj_ctx() */ +#define NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP (1 << 1) +#define NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP (1 << 2) + struct notification { struct { u32 nanoseconds[2]; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index b77db87f7..ddce07161 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -3046,8 +3046,6 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags) "failed to set texlock for compute class"); } - flags |= NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO; - if (g->support_pmu && g->can_elpg) nvgpu_pmu_enable_elpg(g); } diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 2fd393bd7..24b22a7dc 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -1071,9 +1071,9 @@ int gr_gp10b_alloc_gr_ctx(struct gk20a *g, (*gr_ctx)->t18x.ctx_id_valid = false; - if (flags & NVGPU_ALLOC_OBJ_FLAGS_GFXP) + if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; - if (flags & NVGPU_ALLOC_OBJ_FLAGS_CILP) + if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; if (graphics_preempt_mode || compute_preempt_mode) { diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c index fa6109ad8..fc8b16cbc 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c @@ -79,9 +79,9 @@ int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g, gr_ctx = *__gr_ctx; - if (flags & NVGPU_ALLOC_OBJ_FLAGS_GFXP) + if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; - if (flags & NVGPU_ALLOC_OBJ_FLAGS_CILP) + if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; if (priv->constants.force_preempt_mode && !graphics_preempt_mode &&