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gpu: nvgpu: add errata NVGPU_ERRATA_3524791

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Update PES, ROP exception handling for NVGPU_ERRATA_3524791. Enable the
errata for all Volta+ chips.

ROP, PES exceptions are being reported using the physical-id,
where logical-id should have been used. All ESR status registers are
reported using logical-id, so this matches with the SW expectation.
To address the (1), update ROP, PES exception handler translate from
physical to logical-id before reading the status registers.

Bug 3524791

Change-Id: Ieacbfb306bb0e69cf0113dc92f18e401573722e3
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2680029
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Antony Clince Alex
2022-03-11 07:08:53 +00:00
committed by mobile promotions
parent 32a9c6923c
commit 83fe3fd35e
6 changed files with 59 additions and 10 deletions
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4
drivers/gpu/nvgpu/include/nvgpu/errata.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -52,6 +52,8 @@ struct gk20a;
DEFINE_ERRATA(NVGPU_ERRATA_200391931, "GP10B", "GR Perf"), \
/* GV11B */ \
DEFINE_ERRATA(NVGPU_ERRATA_2016608, "GV11B", "FIFO Runlist preempt"), \
DEFINE_ERRATA(NVGPU_ERRATA_3524791, "GV11B", \
"Non Virtualized GPC Exceptions"), \
/* GV100 */ \
DEFINE_ERRATA(NVGPU_ERRATA_1888034, "GV100", "Nvlink"), \
/* TU104 */ \