diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.h b/drivers/gpu/nvgpu/gp106/acr_gp106.h
index 79015a0ac..3fab15093 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __ACR_GP106_H_
-#define __ACR_GP106_H_
+#ifndef NVGPU_ACR_GP106_H
+#define NVGPU_ACR_GP106_H
 
 #define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin"
 #define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin"
@@ -63,4 +63,4 @@ int gp106_flcn_populate_bl_dmem_desc(struct gk20a *g,
 	void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
 int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g,
 		struct lsfm_managed_ucode_img_v2 *pnode);
-#endif /*__PMU_GP106_H_*/
+#endif /* NVGPU_ACR_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.h b/drivers/gpu/nvgpu/gp106/flcn_gp106.h
index 492752349..d16737340 100644
--- a/drivers/gpu/nvgpu/gp106/flcn_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.h
@@ -19,9 +19,9 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __FLCN_GP106_H__
-#define __FLCN_GP106_H__
+#ifndef NVGPU_FLCN_GP106_H
+#define NVGPU_FLCN_GP106_H
 
 int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn);
 
-#endif /* __FLCN_GP106_H__ */
+#endif /* NVGPU_FLCN_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
index 02e530609..d17fd18aa 100644
--- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -19,8 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __GR_CTX_GP106_H__
-#define __GR_CTX_GP106_H__
+#ifndef NVGPU_GR_CTX_GP106_H
+#define NVGPU_GR_CTX_GP106_H
 
 #include "gk20a/gr_ctx_gk20a.h"
 
@@ -31,4 +31,4 @@
 int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name);
 bool gr_gp106_is_firmware_defined(void);
 
-#endif /*__GR_CTX_GP106_H__*/
+#endif /* NVGPU_GR_CTX_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.h b/drivers/gpu/nvgpu/gp106/gr_gp106.h
index 491ced4e0..25d581694 100644
--- a/drivers/gpu/nvgpu/gp106/gr_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/gr_gp106.h
@@ -1,7 +1,7 @@
 /*
  * GP106 GPU GR
  *
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,8 +22,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _NVGPU_GR_GP106_H_
-#define _NVGPU_GR_GP106_H_
+#ifndef NVGPU_GR_GP106_H
+#define NVGPU_GR_GP106_H
 
 struct gk20a;
 
@@ -43,4 +43,4 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g,
 				u32 graphics_preempt_mode,
 				u32 compute_preempt_mode);
 
-#endif
+#endif /* NVGPU_GR_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.h b/drivers/gpu/nvgpu/gp106/hal_gp106.h
index d030c6a64..d46dacec1 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.h
@@ -1,7 +1,7 @@
 /*
  * GP106 Tegra HAL interface
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,9 +22,9 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _NVGPU_HAL_GP106_H
-#define _NVGPU_HAL_GP106_H
+#ifndef NVGPU_HAL_GP106_H
+#define NVGPU_HAL_GP106_H
 struct gk20a;
 
 int gp106_init_hal(struct gk20a *gops);
-#endif
+#endif /* NVGPU_HAL_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/mclk_gp106.h b/drivers/gpu/nvgpu/gp106/mclk_gp106.h
index 9f261b6e3..7f5131a7f 100644
--- a/drivers/gpu/nvgpu/gp106/mclk_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/mclk_gp106.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+* Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
 *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,11 +20,11 @@
  * DEALINGS IN THE SOFTWARE.
 */
 
-#ifndef _MCLK_GP106_H_
-#define _MCLK_GP106_H_
+#ifndef NVGPU_MCLK_GP106_H
+#define NVGPU_MCLK_GP106_H
 
 extern int gp106_mclk_init(struct gk20a *g);
 extern void gp106_mclk_deinit(struct gk20a *g);
 extern int gp106_mclk_change(struct gk20a *g, u16 val);
 
-#endif
+#endif /* NVGPU_MCLK_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_gp106.h
index 361f6e8b7..9cf1202e2 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __PMU_GP106_H_
-#define __PMU_GP106_H_
+#ifndef NVGPU_PMU_GP106_H
+#define NVGPU_PMU_GP106_H
 
 #define gp106_dbg_pmu(g, fmt, arg...) \
 	nvgpu_log(g, gpu_dbg_pmu, fmt, ##arg)
@@ -42,4 +42,4 @@ void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
 bool gp106_pmu_is_engine_in_reset(struct gk20a *g);
 int gp106_pmu_engine_reset(struct gk20a *g, bool do_reset);
 
-#endif /*__PMU_GP106_H_*/
+#endif /* NVGPU_PMU_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.h b/drivers/gpu/nvgpu/gp106/regops_gp106.h
index 45f1fb49c..3de27104f 100644
--- a/drivers/gpu/nvgpu/gp106/regops_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/regops_gp106.h
@@ -22,8 +22,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __REGOPS_GP106_H_
-#define __REGOPS_GP106_H_
+#ifndef NVGPU_REGOPS_GP106_H
+#define NVGPU_REGOPS_GP106_H
 
 const struct regop_offset_range *gp106_get_global_whitelist_ranges(void);
 u64 gp106_get_global_whitelist_ranges_count(void);
@@ -39,4 +39,4 @@ const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void);
 u64 gp106_get_qctl_whitelist_ranges_count(void);
 int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
 
-#endif /* __REGOPS_GP106_H_ */
+#endif /* NVGPU_REGOPS_GP106_H */
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.h b/drivers/gpu/nvgpu/gp106/sec2_gp106.h
index cab3ca5d7..b17028e70 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __SEC2_H_
-#define __SEC2_H_
+#ifndef NVGPU_SEC2_GP106_H
+#define NVGPU_SEC2_GP106_H
 
 int gp106_sec2_clear_halt_interrupt_status(struct gk20a *g,
 	unsigned int timeout);
@@ -33,4 +33,4 @@ int init_sec2_setup_hw1(struct gk20a *g,
 		void *desc, u32 bl_sz);
 int gp106_sec2_reset(struct gk20a *g);
 
-#endif /*__SEC2_H_*/
+#endif /* NVGPU_SEC2_GP106_H */