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gpu: nvgpu: read effective frequency from counter
JIRA DNVGPU-164 Adding export functions to gk20a and gk20a_clk structure Change-Id: Ia448f17a6c456139544c1d36a3e17ceec0edd2f6 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1239465 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1268000 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2011 - 2014, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2011 - 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -89,6 +89,7 @@ struct clk_gk20a {
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struct mutex clk_mutex;
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struct namemap_cfg *clk_namemap;
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u32 namemap_num;
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u32 *namemap_xlat_table;
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bool sw_ready;
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bool clk_hw_on;
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bool debugfs_set;
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@@ -633,6 +633,7 @@ struct gpu_ops {
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int (*init_clk_support)(struct gk20a *g);
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int (*suspend_clk_support)(struct gk20a *g);
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u32 (*get_crystal_clk_hz)(struct gk20a *g);
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u16 (*get_rate)(struct gk20a *g, u32 api_domain);
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} clk;
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struct {
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u32 (*get_arbiter_clk_domains)(struct gk20a *g);
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